Remove stage0 workarounds

crates/core_arch/src/simd_llvm.rs

@@ -49,7 +49,6 @@ extern "platform-intrinsic" {
     pub fn simd_reduce_any<T>(x: T) -> bool;
 
     pub fn simd_select<M, T>(m: M, a: T, b: T) -> T;
-    #[cfg(not(stage0))]
     pub fn simd_select_bitmask<M, T>(m: M, a: T, b: T) -> T;
 
     pub fn simd_fmin<T>(a: T, b: T) -> T;
@@ -58,10 +57,3 @@ extern "platform-intrinsic" {
     pub fn simd_fsqrt<T>(a: T) -> T;
     pub fn simd_fma<T>(a: T, b: T, c: T) -> T;
 }
-
-// incorrect, but compiles until the bootstrap compiler is updated
-#[cfg(stage0)]
-pub fn simd_select_bitmask<M, T>(m: M, a: T, b: T) -> T {
-    drop((m, b));
-    a
-}

crates/core_arch/src/x86/adx.rs

@@ -30,7 +30,6 @@ pub unsafe fn _addcarry_u32(c_in: u8, a: u32, b: u32, out: &mut u32) -> u8 {
 #[target_feature(enable = "adx")]
 #[cfg_attr(test, assert_instr(adc))]
 #[stable(feature = "simd_x86_adx", since = "1.33.0")]
-#[cfg(not(stage0))]
 pub unsafe fn _addcarryx_u32(c_in: u8, a: u32, b: u32, out: &mut u32) -> u8 {
     let r = llvm_addcarryx_u32(c_in, a, b, out as *mut _ as *mut u8);
     r

crates/core_arch/src/x86_64/adx.rs

@@ -30,7 +30,6 @@ pub unsafe fn _addcarry_u64(c_in: u8, a: u64, b: u64, out: &mut u64) -> u8 {
 #[target_feature(enable = "adx")]
 #[cfg_attr(test, assert_instr(adc))]
 #[stable(feature = "simd_x86_adx", since = "1.33.0")]
-#[cfg(not(stage0))]
 pub unsafe fn _addcarryx_u64(c_in: u8, a: u64, b: u64, out: &mut u64) -> u8 {
     llvm_addcarryx_u64(c_in, a, b, out as *mut _ as *mut u8)
 }

crates/core_arch/src/x86_64/cmpxchg16b.rs

@@ -42,7 +42,6 @@ use stdsimd_test::assert_instr;
 #[inline]
 #[cfg_attr(test, assert_instr(cmpxchg16b, success = Ordering::SeqCst, failure = Ordering::SeqCst))]
 #[target_feature(enable = "cmpxchg16b")]
-#[cfg(not(stage0))]
 pub unsafe fn cmpxchg16b(
     dst: *mut u128,
     old: u128,