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[AArch64] FP/SIMD is not mandatory for v8-R #79004

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Merged
merged 1 commit into from
Jan 24, 2024
Merged

[AArch64] FP/SIMD is not mandatory for v8-R #79004

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17 changes: 9 additions & 8 deletions llvm/lib/Target/AArch64/AArch64.td
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Original file line number Diff line number Diff line change
Expand Up @@ -81,7 +81,8 @@ def FeatureFMV : SubtargetFeature<"fmv", "HasFMV", "true",
"Enable Function Multi Versioning support.">;

def FeatureRDM : SubtargetFeature<"rdm", "HasRDM", "true",
"Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions (FEAT_RDM)">;
"Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions (FEAT_RDM)",
[FeatureNEON]>;

def FeaturePAN : SubtargetFeature<
"pan", "HasPAN", "true",
Expand Down Expand Up @@ -321,7 +322,7 @@ def FeatureUseRSqrt : SubtargetFeature<

def FeatureDotProd : SubtargetFeature<
"dotprod", "HasDotProd", "true",
"Enable dot product support (FEAT_DotProd)">;
"Enable dot product support (FEAT_DotProd)", [FeatureNEON]>;

def FeaturePAuth : SubtargetFeature<
"pauth", "HasPAuth", "true",
Expand Down Expand Up @@ -708,15 +709,14 @@ def HasV9_5aOps : SubtargetFeature<
def HasV8_0rOps : SubtargetFeature<
"v8r", "HasV8_0rOps", "true", "Support ARM v8r instructions",
[//v8.1
FeatureCRC, FeaturePAN, FeatureRDM, FeatureLSE, FeatureCONTEXTIDREL2,
FeatureCRC, FeaturePAN, FeatureLSE, FeatureCONTEXTIDREL2,
//v8.2
FeatureRAS, FeaturePsUAO, FeatureCCPP, FeaturePAN_RWV,
//v8.3
FeatureComplxNum, FeatureCCIDX, FeatureJS,
FeaturePAuth, FeatureRCPC,
FeatureCCIDX, FeaturePAuth, FeatureRCPC,
//v8.4
FeatureDotProd, FeatureTRACEV8_4, FeatureTLB_RMI,
FeatureFlagM, FeatureDIT, FeatureSEL2, FeatureRCPC_IMMO,
FeatureTRACEV8_4, FeatureTLB_RMI, FeatureFlagM, FeatureDIT, FeatureSEL2,
FeatureRCPC_IMMO,
// Not mandatory in v8.0-R, but included here on the grounds that it
// only enables names of system registers
FeatureSpecRestrict
Expand Down Expand Up @@ -1420,7 +1420,8 @@ def ProcessorFeatures {
FeaturePerfMon, FeatureSPE, FeatureSPE_EEF];
list<SubtargetFeature> R82 = [HasV8_0rOps, FeaturePerfMon, FeatureFullFP16,
FeatureFP16FML, FeatureSSBS, FeaturePredRes,
FeatureSB];
FeatureSB, FeatureRDM, FeatureDotProd,
FeatureComplxNum, FeatureJS];
list<SubtargetFeature> X1 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
FeatureNEON, FeatureRCPC, FeaturePerfMon,
FeatureSPE, FeatureFullFP16, FeatureDotProd,
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/MC/AArch64/armv8.1a-rdma.s
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@@ -1,6 +1,6 @@
// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.1a -show-encoding < %s 2> %t | FileCheck %s
// RUN: FileCheck --check-prefix=CHECK-ERROR < %t %s
// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8r -show-encoding < %s 2> %t | FileCheck %s
// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8r,+rdm -show-encoding < %s 2> %t | FileCheck %s
// RUN: FileCheck --check-prefix=CHECK-ERROR < %t %s
.text

Expand Down
2 changes: 1 addition & 1 deletion llvm/test/MC/AArch64/armv8.2a-dotprod-errors.s
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@@ -1,6 +1,6 @@
// RUN: not llvm-mc -triple aarch64 -mattr=+dotprod -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-ERROR < %t %s
// RUN: not llvm-mc -triple aarch64 -mattr=+v8r -show-encoding < %s 2> %t
// RUN: not llvm-mc -triple aarch64 -mattr=+v8r,+dotprod -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-ERROR < %t %s

udot v0.2s, v1.8b, v2.4b[4]
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/MC/AArch64/armv8.2a-dotprod.s
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Expand Up @@ -12,13 +12,13 @@
// RUN: llvm-mc -triple aarch64 -mcpu=neoverse-n2 -show-encoding < %s| FileCheck %s --check-prefix=CHECK-DOTPROD
// RUN: llvm-mc -triple aarch64 -mcpu=tsv110 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
// RUN: llvm-mc -triple aarch64 -mcpu=cortex-r82 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
// RUN: llvm-mc -triple aarch64 -mattr=+v8r -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
// RUN: llvm-mc -triple aarch64 -mattr=+v8r,+dotprod -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
// RUN: llvm-mc -triple aarch64 -mcpu=ampere1 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
// RUN: llvm-mc -triple aarch64 -mcpu=ampere1a -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD

// RUN: not llvm-mc -triple aarch64 -mattr=+v8.2a -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-NO-DOTPROD < %t %s
// RUN: not llvm-mc -triple aarch64 -mattr=+v8r,-dotprod -show-encoding < %s 2> %t
// RUN: not llvm-mc -triple aarch64 -mattr=+v8r -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-NO-DOTPROD < %t %s
// RUN: not llvm-mc -triple aarch64 -mcpu=cortex-r82 -mattr=-dotprod -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-NO-DOTPROD < %t %s
Expand Down
3 changes: 3 additions & 0 deletions llvm/test/MC/AArch64/armv8r-sysreg.s
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Original file line number Diff line number Diff line change
@@ -1,4 +1,7 @@
// RUN: llvm-mc -triple aarch64 -show-encoding -mattr=+v8r -o - %s | FileCheck %s
// RUN: llvm-mc -triple aarch64 -show-encoding -mattr=+v8r,-fp-armv8,-rdm,-dotprod,-complxnum,-jsconv -o - %s | FileCheck %s
// RUN: llvm-mc -triple aarch64 -show-encoding -mcpu=cortex-r82 -o - %s | FileCheck %s
// RUN: llvm-mc -triple aarch64 -show-encoding -mcpu=cortex-r82 -mattr=-fp-armv8,-rdm,-dotprod,-complxnum,-jsconv -o - %s | FileCheck %s
.text
mrs x0, VSCTLR_EL2
mrs x0, MPUIR_EL1
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/MC/Disassembler/AArch64/armv8.3a-complex.txt
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@@ -1,7 +1,7 @@
# RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.3a,-fullfp16 --disassemble < %s 2>%t | FileCheck %s --check-prefix=CHECK
# RUN: FileCheck %s < %t --check-prefix=NO-FP16
# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.3a,+fullfp16 --disassemble < %s 2>%t | FileCheck %s --check-prefix=CHECK --check-prefix=FP16
# RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8r --disassemble < %s 2>%t | FileCheck %s --check-prefix=CHECK
# RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8r,+complxnum --disassemble < %s 2>%t | FileCheck %s --check-prefix=CHECK
# RUN: FileCheck %s < %t --check-prefix=NO-FP16
# RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=-v8.3a,+fullfp16 --disassemble < %s 2>&1 | FileCheck %s --check-prefix=NO-V83A

Expand Down
2 changes: 1 addition & 1 deletion llvm/test/MC/Disassembler/AArch64/armv8.3a-js.txt
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@@ -1,4 +1,4 @@
# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.3a --disassemble < %s | FileCheck %s
# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8r --disassemble < %s | FileCheck %s
# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8r,+jsconv --disassemble < %s | FileCheck %s
# CHECK: fjcvtzs w0, d0
[0x00,0x00,0x7e,0x1e]