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[MLIR][ROCDL] Add dynamically legal ops to LowerGpuOpsToROCDLOpsPass #108302
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@llvm/pr-subscribers-mlir @llvm/pr-subscribers-mlir-gpu Author: Nirvedh Meshram (nirvedhmeshram) ChangesSimilar to #108266 Full diff: https://github.com/llvm/llvm-project/pull/108302.diff 1 Files Affected:
diff --git a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
index 29926719129dc5..1265f3f48a418e 100644
--- a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
+++ b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
@@ -332,7 +332,14 @@ void mlir::configureGpuToROCDLConversionLegality(ConversionTarget &target) {
target.addIllegalOp<LLVM::CosOp, LLVM::ExpOp, LLVM::Exp2Op, LLVM::FCeilOp,
LLVM::FFloorOp, LLVM::FRemOp, LLVM::LogOp, LLVM::Log10Op,
LLVM::Log2Op, LLVM::PowOp, LLVM::SinOp>();
-
+ // These ops are legal for f32 type.
+ target.addDynamicallyLegalOp<LLVM::ExpOp, LLVM::LogOp>(
+ [](mlir::Operation *op) {
+ return llvm::any_of(op->getOperandTypes(), [](Type type) {
+ return llvm::isa<FloatType>(type) &&
+ type.getIntOrFloatBitWidth() == 32;
+ });
+ });
// TODO: Remove once we support replacing non-root ops.
target.addLegalOp<gpu::YieldOp, gpu::GPUModuleOp>();
}
|
Can you please add a test? |
done! |
Bumps llvm to commit: iree-org/llvm-project@e268afb in branch https://github.com/iree-org/llvm-project/tree/shared/integrates_20240910 Following changes are made: 1. Fix formatv call to pass validation added by llvm/llvm-project#105745 2. API changes in DICompositeTypeAttr::get introduced by llvm/llvm-project#106571 3. Fix API call from llvm/llvm-project#100361 4. Fix chipset comparison in ROCMTarget.cpp There are two cherry-picks from upstream main as they contain fixes we need and one cheery-pick that is yet to land 1. iree-org/llvm-project@0d5d355 2. iree-org/llvm-project@650d852 3. iree-org/llvm-project@e268afb (the upstream PR for this one is llvm/llvm-project#108302 And a revert due to an outstanding torch-mlir issue iree-org/llvm-project@cf22797
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LGTM
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/177/builds/4875 Here is the relevant piece of the build log for the reference
|
Transient failure, builds 4876 and 4877 had no problems. |
Bumps llvm to commit: iree-org/llvm-project@e268afb in branch https://github.com/iree-org/llvm-project/tree/shared/integrates_20240910 Following changes are made: 1. Fix formatv call to pass validation added by llvm/llvm-project#105745 2. API changes in DICompositeTypeAttr::get introduced by llvm/llvm-project#106571 3. Fix API call from llvm/llvm-project#100361 4. Fix chipset comparison in ROCMTarget.cpp There are two cherry-picks from upstream main as they contain fixes we need and one cheery-pick that is yet to land 1. iree-org/llvm-project@0d5d355 2. iree-org/llvm-project@650d852 3. iree-org/llvm-project@e268afb (the upstream PR for this one is llvm/llvm-project#108302 And a revert due to an outstanding torch-mlir issue iree-org/llvm-project@cf22797
Similar to #108266
After #102971
It is legal to generate
LLVM::ExpOp
andLLVM::LogOp
if the type is is a float narrower than f64