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XinWang10XinWang10
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[NFC][X86] Reorg MC tests for APX promoted instrs (#76697)
As suggested in #76210, this patch re-organize the mc tests for apx promoted instrs, instr tests within same cpuid would be listed in one test. Also add explicit prefix {evex} tests and 8 displacement memory test, promoted instrs need set No_CD8 to avoid AVX512 compress encoding.
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‎llvm/lib/Target/X86/X86InstrMisc.td

+6-6
Original file line numberDiff line numberDiff line change
@@ -1353,22 +1353,22 @@ multiclass bmi_pdep_pext<string mnemonic, RegisterClass RC,
13531353
def rr#Suffix : I<0xF5, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2),
13541354
!strconcat(mnemonic, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
13551355
[(set RC:$dst, (OpNode RC:$src1, RC:$src2))]>,
1356-
VEX, VVVV, Sched<[WriteALU]>;
1356+
NoCD8, VVVV, Sched<[WriteALU]>;
13571357
def rm#Suffix : I<0xF5, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
13581358
!strconcat(mnemonic, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
13591359
[(set RC:$dst, (OpNode RC:$src1, (ld_frag addr:$src2)))]>,
1360-
VEX, VVVV, Sched<[WriteALU.Folded, WriteALU.ReadAfterFold]>;
1360+
NoCD8, VVVV, Sched<[WriteALU.Folded, WriteALU.ReadAfterFold]>;
13611361
}
13621362

13631363
let Predicates = [HasBMI2, NoEGPR] in {
13641364
defm PDEP32 : bmi_pdep_pext<"pdep{l}", GR32, i32mem,
1365-
X86pdep, loadi32>, T8, XD;
1365+
X86pdep, loadi32>, T8, XD, VEX;
13661366
defm PDEP64 : bmi_pdep_pext<"pdep{q}", GR64, i64mem,
1367-
X86pdep, loadi64>, T8, XD, REX_W;
1367+
X86pdep, loadi64>, T8, XD, REX_W, VEX;
13681368
defm PEXT32 : bmi_pdep_pext<"pext{l}", GR32, i32mem,
1369-
X86pext, loadi32>, T8, XS;
1369+
X86pext, loadi32>, T8, XS, VEX;
13701370
defm PEXT64 : bmi_pdep_pext<"pext{q}", GR64, i64mem,
1371-
X86pext, loadi64>, T8, XS, REX_W;
1371+
X86pext, loadi64>, T8, XS, REX_W, VEX;
13721372
}
13731373

13741374
let Predicates = [HasBMI2, HasEGPR] in {

‎llvm/lib/Target/X86/X86InstrShiftRotate.td

+1-1
Original file line numberDiff line numberDiff line change
@@ -868,7 +868,7 @@ let Predicates = [HasBMI2, NoEGPR] in {
868868
defm SHLX64 : bmi_shift<"shlx{q}", GR64, i64mem>, T8, PD, REX_W;
869869
}
870870

871-
let Predicates = [HasBMI2, HasEGPR] in {
871+
let Predicates = [HasBMI2, HasEGPR, In64BitMode] in {
872872
defm RORX32 : bmi_rotate<"rorx{l}", GR32, i32mem, "_EVEX">, EVEX;
873873
defm RORX64 : bmi_rotate<"rorx{q}", GR64, i64mem, "_EVEX">, REX_W, EVEX;
874874
defm SARX32 : bmi_shift<"sarx{l}", GR32, i32mem, "_EVEX">, T8, XS, EVEX;

‎llvm/test/MC/Disassembler/X86/apx/amx-tile.txt

+30
Original file line numberDiff line numberDiff line change
@@ -1,22 +1,52 @@
11
# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
22
# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
33

4+
## ldtilecfg
5+
6+
# ATT: ldtilecfg 123(%rax,%rbx,4)
7+
# INTEL: ldtilecfg [rax + 4*rbx + 123]
8+
0x62,0xf2,0x7c,0x08,0x49,0x44,0x98,0x7b
9+
410
# ATT: ldtilecfg 291(%r28,%r29,4)
511
# INTEL: ldtilecfg [r28 + 4*r29 + 291]
612
0x62,0x9a,0x78,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00
713

14+
## sttilecfg
15+
16+
# ATT: sttilecfg 123(%rax,%rbx,4)
17+
# INTEL: sttilecfg [rax + 4*rbx + 123]
18+
0x62,0xf2,0x7d,0x08,0x49,0x44,0x98,0x7b
19+
820
# ATT: sttilecfg 291(%r28,%r29,4)
921
# INTEL: sttilecfg [r28 + 4*r29 + 291]
1022
0x62,0x9a,0x79,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00
1123

24+
## tileloadd
25+
26+
# ATT: tileloadd 123(%rax,%rbx,4), %tmm6
27+
# INTEL: tileloadd tmm6, [rax + 4*rbx + 123]
28+
0x62,0xf2,0x7f,0x08,0x4b,0x74,0x98,0x7b
29+
1230
# ATT: tileloadd 291(%r28,%r29,4), %tmm6
1331
# INTEL: tileloadd tmm6, [r28 + 4*r29 + 291]
1432
0x62,0x9a,0x7b,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00
1533

34+
## tileloaddt1
35+
36+
# ATT: tileloaddt1 123(%rax,%rbx,4), %tmm6
37+
# INTEL: tileloaddt1 tmm6, [rax + 4*rbx + 123]
38+
0x62,0xf2,0x7d,0x08,0x4b,0x74,0x98,0x7b
39+
1640
# ATT: tileloaddt1 291(%r28,%r29,4), %tmm6
1741
# INTEL: tileloaddt1 tmm6, [r28 + 4*r29 + 291]
1842
0x62,0x9a,0x79,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00
1943

44+
## tilestored
45+
46+
# ATT: tilestored %tmm6, 123(%rax,%rbx,4)
47+
# INTEL: tilestored [rax + 4*rbx + 123], tmm6
48+
0x62,0xf2,0x7e,0x08,0x4b,0x74,0x98,0x7b
49+
2050
# ATT: tilestored %tmm6, 291(%r28,%r29,4)
2151
# INTEL: tilestored [r28 + 4*r29 + 291], tmm6
2252
0x62,0x9a,0x7a,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00

‎llvm/test/MC/Disassembler/X86/apx/bmi2.txt

+240
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,240 @@
1+
# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
2+
# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
3+
4+
## mulx
5+
6+
# ATT: mulxl %ecx, %edx, %r10d
7+
# INTEL: mulx r10d, edx, ecx
8+
0x62,0x72,0x6f,0x08,0xf6,0xd1
9+
10+
# ATT: mulxq %r9, %r15, %r11
11+
# INTEL: mulx r11, r15, r9
12+
0x62,0x52,0x87,0x08,0xf6,0xd9
13+
14+
# ATT: mulxl 123(%rax,%rbx,4), %ecx, %edx
15+
# INTEL: mulx edx, ecx, dword ptr [rax + 4*rbx + 123]
16+
0x62,0xf2,0x77,0x08,0xf6,0x94,0x98,0x7b,0x00,0x00,0x00
17+
18+
# ATT: mulxq 123(%rax,%rbx,4), %r9, %r15
19+
# INTEL: mulx r15, r9, qword ptr [rax + 4*rbx + 123]
20+
0x62,0x72,0xb7,0x08,0xf6,0xbc,0x98,0x7b,0x00,0x00,0x00
21+
22+
# ATT: mulxl %r18d, %r22d, %r26d
23+
# INTEL: mulx r26d, r22d, r18d
24+
0x62,0x6a,0x4f,0x00,0xf6,0xd2
25+
26+
# ATT: mulxq %r19, %r23, %r27
27+
# INTEL: mulx r27, r23, r19
28+
0x62,0x6a,0xc7,0x00,0xf6,0xdb
29+
30+
# ATT: mulxl 291(%r28,%r29,4), %r18d, %r22d
31+
# INTEL: mulx r22d, r18d, dword ptr [r28 + 4*r29 + 291]
32+
0x62,0x8a,0x6b,0x00,0xf6,0xb4,0xac,0x23,0x01,0x00,0x00
33+
34+
# ATT: mulxq 291(%r28,%r29,4), %r19, %r23
35+
# INTEL: mulx r23, r19, qword ptr [r28 + 4*r29 + 291]
36+
0x62,0x8a,0xe3,0x00,0xf6,0xbc,0xac,0x23,0x01,0x00,0x00
37+
38+
## pdep
39+
40+
# ATT: pdepl %ecx, %edx, %r10d
41+
# INTEL: pdep r10d, edx, ecx
42+
0x62,0x72,0x6f,0x08,0xf5,0xd1
43+
44+
# ATT: pdepq %r9, %r15, %r11
45+
# INTEL: pdep r11, r15, r9
46+
0x62,0x52,0x87,0x08,0xf5,0xd9
47+
48+
# ATT: pdepl 123(%rax,%rbx,4), %ecx, %edx
49+
# INTEL: pdep edx, ecx, dword ptr [rax + 4*rbx + 123]
50+
0x62,0xf2,0x77,0x08,0xf5,0x54,0x98,0x7b
51+
52+
# ATT: pdepq 123(%rax,%rbx,4), %r9, %r15
53+
# INTEL: pdep r15, r9, qword ptr [rax + 4*rbx + 123]
54+
0x62,0x72,0xb7,0x08,0xf5,0x7c,0x98,0x7b
55+
56+
# ATT: pdepl %r18d, %r22d, %r26d
57+
# INTEL: pdep r26d, r22d, r18d
58+
0x62,0x6a,0x4f,0x00,0xf5,0xd2
59+
60+
# ATT: pdepq %r19, %r23, %r27
61+
# INTEL: pdep r27, r23, r19
62+
0x62,0x6a,0xc7,0x00,0xf5,0xdb
63+
64+
# ATT: pdepl 291(%r28,%r29,4), %r18d, %r22d
65+
# INTEL: pdep r22d, r18d, dword ptr [r28 + 4*r29 + 291]
66+
0x62,0x8a,0x6b,0x00,0xf5,0xb4,0xac,0x23,0x01,0x00,0x00
67+
68+
# ATT: pdepq 291(%r28,%r29,4), %r19, %r23
69+
# INTEL: pdep r23, r19, qword ptr [r28 + 4*r29 + 291]
70+
0x62,0x8a,0xe3,0x00,0xf5,0xbc,0xac,0x23,0x01,0x00,0x00
71+
72+
## pext
73+
74+
# ATT: pextl %ecx, %edx, %r10d
75+
# INTEL: pext r10d, edx, ecx
76+
0x62,0x72,0x6e,0x08,0xf5,0xd1
77+
78+
# ATT: pextq %r9, %r15, %r11
79+
# INTEL: pext r11, r15, r9
80+
0x62,0x52,0x86,0x08,0xf5,0xd9
81+
82+
# ATT: pextl 123(%rax,%rbx,4), %ecx, %edx
83+
# INTEL: pext edx, ecx, dword ptr [rax + 4*rbx + 123]
84+
0x62,0xf2,0x76,0x08,0xf5,0x54,0x98,0x7b
85+
86+
# ATT: pextq 123(%rax,%rbx,4), %r9, %r15
87+
# INTEL: pext r15, r9, qword ptr [rax + 4*rbx + 123]
88+
0x62,0x72,0xb6,0x08,0xf5,0x7c,0x98,0x7b
89+
90+
# ATT: pextl %r18d, %r22d, %r26d
91+
# INTEL: pext r26d, r22d, r18d
92+
0x62,0x6a,0x4e,0x00,0xf5,0xd2
93+
94+
# ATT: pextq %r19, %r23, %r27
95+
# INTEL: pext r27, r23, r19
96+
0x62,0x6a,0xc6,0x00,0xf5,0xdb
97+
98+
# ATT: pextl 291(%r28,%r29,4), %r18d, %r22d
99+
# INTEL: pext r22d, r18d, dword ptr [r28 + 4*r29 + 291]
100+
0x62,0x8a,0x6a,0x00,0xf5,0xb4,0xac,0x23,0x01,0x00,0x00
101+
102+
# ATT: pextq 291(%r28,%r29,4), %r19, %r23
103+
# INTEL: pext r23, r19, qword ptr [r28 + 4*r29 + 291]
104+
0x62,0x8a,0xe2,0x00,0xf5,0xbc,0xac,0x23,0x01,0x00,0x00
105+
106+
## rorx
107+
108+
# ATT: rorxl $123, %ecx, %edx
109+
# INTEL: rorx edx, ecx, 123
110+
0x62,0xf3,0x7f,0x08,0xf0,0xd1,0x7b
111+
112+
# ATT: rorxq $123, %r9, %r15
113+
# INTEL: rorx r15, r9, 123
114+
0x62,0x53,0xff,0x08,0xf0,0xf9,0x7b
115+
116+
# ATT: rorxl $123, 123(%rax,%rbx,4), %ecx
117+
# INTEL: rorx ecx, dword ptr [rax + 4*rbx + 123], 123
118+
0x62,0xf3,0x7f,0x08,0xf0,0x8c,0x98,0x7b,0x00,0x00,0x00,0x7b
119+
120+
# ATT: rorxq $123, 123(%rax,%rbx,4), %r9
121+
# INTEL: rorx r9, qword ptr [rax + 4*rbx + 123], 123
122+
0x62,0x73,0xff,0x08,0xf0,0x8c,0x98,0x7b,0x00,0x00,0x00,0x7b
123+
124+
# ATT: rorxl $123, %r18d, %r22d
125+
# INTEL: rorx r22d, r18d, 123
126+
0x62,0xeb,0x7f,0x08,0xf0,0xf2,0x7b
127+
128+
# ATT: rorxq $123, %r19, %r23
129+
# INTEL: rorx r23, r19, 123
130+
0x62,0xeb,0xff,0x08,0xf0,0xfb,0x7b
131+
132+
# ATT: rorxl $123, 291(%r28,%r29,4), %r18d
133+
# INTEL: rorx r18d, dword ptr [r28 + 4*r29 + 291], 123
134+
0x62,0x8b,0x7b,0x08,0xf0,0x94,0xac,0x23,0x01,0x00,0x00,0x7b
135+
136+
# ATT: rorxq $123, 291(%r28,%r29,4), %r19
137+
# INTEL: rorx r19, qword ptr [r28 + 4*r29 + 291], 123
138+
0x62,0x8b,0xfb,0x08,0xf0,0x9c,0xac,0x23,0x01,0x00,0x00,0x7b
139+
140+
## sarx
141+
142+
# ATT: sarxl %ecx, %edx, %r10d
143+
# INTEL: sarx r10d, edx, ecx
144+
0x62,0x72,0x76,0x08,0xf7,0xd2
145+
146+
# ATT: sarxl %ecx, 123(%rax,%rbx,4), %edx
147+
# INTEL: sarx edx, dword ptr [rax + 4*rbx + 123], ecx
148+
0x62,0xf2,0x76,0x08,0xf7,0x94,0x98,0x7b,0x00,0x00,0x00
149+
150+
# ATT: sarxq %r9, %r15, %r11
151+
# INTEL: sarx r11, r15, r9
152+
0x62,0x52,0xb6,0x08,0xf7,0xdf
153+
154+
# ATT: sarxq %r9, 123(%rax,%rbx,4), %r15
155+
# INTEL: sarx r15, qword ptr [rax + 4*rbx + 123], r9
156+
0x62,0x72,0xb6,0x08,0xf7,0xbc,0x98,0x7b,0x00,0x00,0x00
157+
158+
# ATT: sarxl %r18d, %r22d, %r26d
159+
# INTEL: sarx r26d, r22d, r18d
160+
0x62,0x6a,0x6e,0x00,0xf7,0xd6
161+
162+
# ATT: sarxl %r18d, 291(%r28,%r29,4), %r22d
163+
# INTEL: sarx r22d, dword ptr [r28 + 4*r29 + 291], r18d
164+
0x62,0x8a,0x6a,0x00,0xf7,0xb4,0xac,0x23,0x01,0x00,0x00
165+
166+
# ATT: sarxq %r19, %r23, %r27
167+
# INTEL: sarx r27, r23, r19
168+
0x62,0x6a,0xe6,0x00,0xf7,0xdf
169+
170+
# ATT: sarxq %r19, 291(%r28,%r29,4), %r23
171+
# INTEL: sarx r23, qword ptr [r28 + 4*r29 + 291], r19
172+
0x62,0x8a,0xe2,0x00,0xf7,0xbc,0xac,0x23,0x01,0x00,0x00
173+
174+
## shlx
175+
176+
# ATT: shlxl %ecx, %edx, %r10d
177+
# INTEL: shlx r10d, edx, ecx
178+
0x62,0x72,0x75,0x08,0xf7,0xd2
179+
180+
# ATT: shlxl %ecx, 123(%rax,%rbx,4), %edx
181+
# INTEL: shlx edx, dword ptr [rax + 4*rbx + 123], ecx
182+
0x62,0xf2,0x75,0x08,0xf7,0x94,0x98,0x7b,0x00,0x00,0x00
183+
184+
# ATT: shlxq %r9, %r15, %r11
185+
# INTEL: shlx r11, r15, r9
186+
0x62,0x52,0xb5,0x08,0xf7,0xdf
187+
188+
# ATT: shlxq %r9, 123(%rax,%rbx,4), %r15
189+
# INTEL: shlx r15, qword ptr [rax + 4*rbx + 123], r9
190+
0x62,0x72,0xb5,0x08,0xf7,0xbc,0x98,0x7b,0x00,0x00,0x00
191+
192+
# ATT: shlxl %r18d, %r22d, %r26d
193+
# INTEL: shlx r26d, r22d, r18d
194+
0x62,0x6a,0x6d,0x00,0xf7,0xd6
195+
196+
# ATT: shlxl %r18d, 291(%r28,%r29,4), %r22d
197+
# INTEL: shlx r22d, dword ptr [r28 + 4*r29 + 291], r18d
198+
0x62,0x8a,0x69,0x00,0xf7,0xb4,0xac,0x23,0x01,0x00,0x00
199+
200+
# ATT: shlxq %r19, %r23, %r27
201+
# INTEL: shlx r27, r23, r19
202+
0x62,0x6a,0xe5,0x00,0xf7,0xdf
203+
204+
# ATT: shlxq %r19, 291(%r28,%r29,4), %r23
205+
# INTEL: shlx r23, qword ptr [r28 + 4*r29 + 291], r19
206+
0x62,0x8a,0xe1,0x00,0xf7,0xbc,0xac,0x23,0x01,0x00,0x00
207+
208+
## shrx
209+
210+
# ATT: shrxl %ecx, %edx, %r10d
211+
# INTEL: shrx r10d, edx, ecx
212+
0x62,0x72,0x77,0x08,0xf7,0xd2
213+
214+
# ATT: shrxl %ecx, 123(%rax,%rbx,4), %edx
215+
# INTEL: shrx edx, dword ptr [rax + 4*rbx + 123], ecx
216+
0x62,0xf2,0x77,0x08,0xf7,0x94,0x98,0x7b,0x00,0x00,0x00
217+
218+
# ATT: shrxq %r9, %r15, %r11
219+
# INTEL: shrx r11, r15, r9
220+
0x62,0x52,0xb7,0x08,0xf7,0xdf
221+
222+
# ATT: shrxq %r9, 123(%rax,%rbx,4), %r15
223+
# INTEL: shrx r15, qword ptr [rax + 4*rbx + 123], r9
224+
0x62,0x72,0xb7,0x08,0xf7,0xbc,0x98,0x7b,0x00,0x00,0x00
225+
226+
# ATT: shrxl %r18d, %r22d, %r26d
227+
# INTEL: shrx r26d, r22d, r18d
228+
0x62,0x6a,0x6f,0x00,0xf7,0xd6
229+
230+
# ATT: shrxl %r18d, 291(%r28,%r29,4), %r22d
231+
# INTEL: shrx r22d, dword ptr [r28 + 4*r29 + 291], r18d
232+
0x62,0x8a,0x6b,0x00,0xf7,0xb4,0xac,0x23,0x01,0x00,0x00
233+
234+
# ATT: shrxq %r19, %r23, %r27
235+
# INTEL: shrx r27, r23, r19
236+
0x62,0x6a,0xe7,0x00,0xf7,0xdf
237+
238+
# ATT: shrxq %r19, 291(%r28,%r29,4), %r23
239+
# INTEL: shrx r23, qword ptr [r28 + 4*r29 + 291], r19
240+
0x62,0x8a,0xe3,0x00,0xf7,0xbc,0xac,0x23,0x01,0x00,0x00

‎llvm/test/MC/Disassembler/X86/apx/cet.txt

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# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
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# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
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## wrssd
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# ATT: wrssd %ecx, 123(%rax,%rbx,4)
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# INTEL: wrssd dword ptr [rax + 4*rbx + 123], ecx
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0x62,0xf4,0x7c,0x08,0x66,0x4c,0x98,0x7b
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# ATT: wrssd %r18d, 291(%r28,%r29,4)
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# INTEL: wrssd dword ptr [r28 + 4*r29 + 291], r18d
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0x62,0x8c,0x78,0x08,0x66,0x94,0xac,0x23,0x01,0x00,0x00
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## wrssq
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# ATT: wrssq %r9, 123(%rax,%rbx,4)
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# INTEL: wrssq qword ptr [rax + 4*rbx + 123], r9
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0x62,0x74,0xfc,0x08,0x66,0x4c,0x98,0x7b
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# ATT: wrssq %r19, 291(%r28,%r29,4)
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# INTEL: wrssq qword ptr [r28 + 4*r29 + 291], r19
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0x62,0x8c,0xf8,0x08,0x66,0x9c,0xac,0x23,0x01,0x00,0x00
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## wrussd
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# ATT: wrussd %ecx, 123(%rax,%rbx,4)
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# INTEL: wrussd dword ptr [rax + 4*rbx + 123], ecx
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0x62,0xf4,0x7d,0x08,0x65,0x4c,0x98,0x7b
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# ATT: wrussd %r18d, 291(%r28,%r29,4)
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# INTEL: wrussd dword ptr [r28 + 4*r29 + 291], r18d
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0x62,0x8c,0x79,0x08,0x65,0x94,0xac,0x23,0x01,0x00,0x00
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## wrussq
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# ATT: wrussq %r9, 123(%rax,%rbx,4)
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# INTEL: wrussq qword ptr [rax + 4*rbx + 123], r9
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0x62,0x74,0xfd,0x08,0x65,0x4c,0x98,0x7b
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# ATT: wrussq %r19, 291(%r28,%r29,4)
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# INTEL: wrussq qword ptr [r28 + 4*r29 + 291], r19
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0x62,0x8c,0xf9,0x08,0x65,0x9c,0xac,0x23,0x01,0x00,0x00

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