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llvm: Update the list of targets that use native f16/f128.
Closes #22003. Closes #22013.
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-24
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2 files changed

+33
-24
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lib/compiler_rt/common.zig

+17-13
Original file line numberDiff line numberDiff line change
@@ -96,21 +96,25 @@ pub const want_sparc_abi = builtin.cpu.arch.isSPARC();
9696
// we're trying to test compiler-rt.
9797
pub const panic = if (builtin.is_test) std.debug.FullPanic(std.debug.defaultPanic) else std.debug.no_panic;
9898

99-
/// AArch64 is the only ABI (at the moment) to support f16 arguments without the
100-
/// need for extending them to wider fp types.
101-
/// TODO remove this; do this type selection in the language rather than
102-
/// here in compiler-rt.
99+
/// This seems to mostly correspond to `clang::TargetInfo::HasFloat16`.
103100
pub fn F16T(comptime OtherType: type) type {
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return switch (builtin.cpu.arch) {
105-
.arm, .armeb, .thumb, .thumbeb => if (std.Target.arm.featureSetHas(builtin.cpu.features, .has_v8))
106-
switch (builtin.abi.float()) {
107-
.soft => u16,
108-
.hard => f16,
109-
}
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else
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u16,
112-
.aarch64, .aarch64_be => f16,
113-
.riscv32, .riscv64 => f16,
102+
.amdgcn,
103+
.arm,
104+
.armeb,
105+
.thumb,
106+
.thumbeb,
107+
.aarch64,
108+
.aarch64_be,
109+
.nvptx,
110+
.nvptx64,
111+
.riscv32,
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.riscv64,
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.spirv,
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.spirv32,
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.spirv64,
116+
=> f16,
117+
.hexagon => if (std.Target.hexagon.featureSetHas(builtin.target.cpu.features, .v68)) f16 else u16,
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.x86, .x86_64 => if (builtin.target.os.tag.isDarwin()) switch (OtherType) {
115119
// Starting with LLVM 16, Darwin uses different abi for f16
116120
// depending on the type of the other return/argument..???

src/codegen/llvm.zig

+16-11
Original file line numberDiff line numberDiff line change
@@ -12472,29 +12472,30 @@ fn backendSupportsF80(target: std.Target) bool {
1247212472
/// or if it produces miscompilations.
1247312473
fn backendSupportsF16(target: std.Target) bool {
1247412474
return switch (target.cpu.arch) {
12475-
// LoongArch can be removed from this list with LLVM 20.
12476-
.loongarch32,
12477-
.loongarch64,
12475+
// https://github.com/llvm/llvm-project/issues/97981
12476+
.csky,
12477+
// https://github.com/llvm/llvm-project/issues/97981
1247812478
.hexagon,
12479+
// https://github.com/llvm/llvm-project/issues/97981
1247912480
.powerpc,
1248012481
.powerpcle,
1248112482
.powerpc64,
1248212483
.powerpc64le,
12484+
// https://github.com/llvm/llvm-project/issues/97981
1248312485
.wasm32,
1248412486
.wasm64,
12485-
.mips,
12486-
.mipsel,
12487-
.mips64,
12488-
.mips64el,
12487+
// https://github.com/llvm/llvm-project/issues/50374
1248912488
.s390x,
12489+
// https://github.com/llvm/llvm-project/issues/97981
1249012490
.sparc,
1249112491
.sparc64,
1249212492
=> false,
1249312493
.arm,
1249412494
.armeb,
1249512495
.thumb,
1249612496
.thumbeb,
12497-
=> target.abi.float() == .soft or std.Target.arm.featureSetHas(target.cpu.features, .fp_armv8),
12497+
=> target.abi.float() == .soft or std.Target.arm.featureSetHas(target.cpu.features, .fullfp16),
12498+
// https://github.com/llvm/llvm-project/issues/129394
1249812499
.aarch64,
1249912500
.aarch64_be,
1250012501
=> std.Target.aarch64.featureSetHas(target.cpu.features, .fp_armv8),
@@ -12507,11 +12508,18 @@ fn backendSupportsF16(target: std.Target) bool {
1250712508
/// or if it produces miscompilations.
1250812509
fn backendSupportsF128(target: std.Target) bool {
1250912510
return switch (target.cpu.arch) {
12511+
// https://github.com/llvm/llvm-project/issues/121122
1251012512
.amdgcn,
12513+
// Test failures all over the place.
1251112514
.mips64,
1251212515
.mips64el,
12516+
// https://github.com/llvm/llvm-project/issues/95471
12517+
.nvptx,
12518+
.nvptx64,
12519+
// https://github.com/llvm/llvm-project/issues/41838
1251312520
.sparc,
1251412521
=> false,
12522+
// https://github.com/llvm/llvm-project/issues/101545
1251512523
.powerpc,
1251612524
.powerpcle,
1251712525
.powerpc64,
@@ -12522,9 +12530,6 @@ fn backendSupportsF128(target: std.Target) bool {
1252212530
.thumb,
1252312531
.thumbeb,
1252412532
=> target.abi.float() == .soft or std.Target.arm.featureSetHas(target.cpu.features, .fp_armv8),
12525-
.aarch64,
12526-
.aarch64_be,
12527-
=> std.Target.aarch64.featureSetHas(target.cpu.features, .fp_armv8),
1252812533
else => true,
1252912534
};
1253012535
}

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