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author
Romaric JODIN
committed
dpu: llvm: fix unaligned load/store
1 parent f3a755d commit c8c7ca7

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3 files changed

+93
-636
lines changed

3 files changed

+93
-636
lines changed

‎llvm/lib/Target/DPU/DPUInstrInfo.td

+58-98
Original file line numberDiff line numberDiff line change
@@ -51,16 +51,6 @@ def DPUcallseq_end : SDNode<"ISD::CALLSEQ_END", SDT_DPUCallSeqEnd, [SDNPH
5151

5252
def DPUcall : SDNode<"DPUISD::CALL", SDT_DPUCall, [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue, SDNPVariadic]>;
5353

54-
def SDT_STORE_OP : SDTypeProfile<0, 2, [SDTCisPtrTy<1>]>;
55-
def SDT_LOAD_OP : SDTypeProfile<1, 1, [SDTCisPtrTy<1>]>;
56-
def WramStore8Imm : SDNode<"DPUISD::WRAM_STORE_8_IMM", SDT_STORE_OP, [SDNPHasChain, SDNPMayStore]>;
57-
def WramStore16Imm : SDNode<"DPUISD::WRAM_STORE_16_IMM", SDT_STORE_OP, [SDNPHasChain, SDNPMayStore]>;
58-
def WramStore32Imm : SDNode<"DPUISD::WRAM_STORE_32_IMM", SDT_STORE_OP, [SDNPHasChain, SDNPMayStore]>;
59-
def WramStore64Imm : SDNode<"DPUISD::WRAM_STORE_64_IMM", SDT_STORE_OP, [SDNPHasChain, SDNPMayStore]>;
60-
def WramStore64 : SDNode<"DPUISD::WRAM_STORE_64", SDT_STORE_OP, [SDNPHasChain, SDNPMayStore]>;
61-
def WramStore64Aligned : SDNode<"DPUISD::WRAM_STORE_64_ALIGNED", SDT_STORE_OP, [SDNPHasChain, SDNPMayStore]>;
62-
def MramStore64 : SDNode<"DPUISD::MRAM_STORE_64", SDT_STORE_OP, [SDNPHasChain, SDNPMayStore]>;
63-
6454
// To promote special types of operands to registers (see the patterns below).
6555
def SDTDPUWrapper : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>, SDTCisPtrTy<0>]>;
6656
def DPUWrapper : SDNode<"DPUISD::Wrapper", SDTDPUWrapper>;
@@ -97,8 +87,6 @@ class wram_store_frag<PatFrag base_store> : PatFrag<(ops node:$val, node:$ptr),
9787
return IsAStoreToAddrSpace(N, DPUADDR_SPACE::WRAM);
9888
}]>;
9989

100-
def wram_loadi64 : PatFrag<(ops node:$ptr), (i64 (wram_load_frag<load> node:$ptr))>;
101-
10290
multiclass WramLoadXPat<ImmOperand LdTy, PatFrag LoadOp, DPUInstruction Inst> {
10391
def : Pat<(LdTy (wram_load_frag<LoadOp> SimpleRegOrCst:$ra)), (Inst SimpleRegOrCst:$ra, 0)>;
10492
def : Pat<(LdTy (wram_load_frag<LoadOp> AddrFI:$ra)), (Inst AddrFI:$ra, 0)>;
@@ -162,74 +150,23 @@ defm : WramLoadPat<extloadi8, LBSrri, LBS_Srri>;
162150
defm : WramLoadPat<zextloadi16, LHUrri, LHU_Urri>;
163151
defm : WramLoadPat<sextloadi16, LHSrri, LHS_Srri>;
164152
defm : WramLoadPat<extloadi16, LHSrri, LHS_Srri>;
165-
defm : WramLoadXPat<i32, load, LWrri>;
153+
defm : WramLoadPat<load, LWrri, LDrri>;
166154
defm : WramLoadXPat<i64, zextloadi32, LW_Urri>;
167155
defm : WramLoadXPat<i64, sextloadi32, LW_Srri>;
168156
defm : WramLoadXPat<i64, extloadi32, LW_Srri>;
169157

170158
defm : WramStorePat<truncstorei8, SBrir, SimpleReg>;
171159
defm : WramStorePat<truncstorei16, SHrir, SimpleReg>;
172160
defm : WramStorePat<store, SWrir, SimpleReg>;
161+
defm : WramStorePat<store, SDrir, DoubleReg>;
173162

174163
defm : WramStoreSub64Pat<truncstorei8, SBrir>;
175164
defm : WramStoreSub64Pat<truncstorei16, SHrir>;
176165
defm : WramStoreSub64Pat<truncstorei32, SWrir>;
177166

178-
defm : WramStoreImmPat<WramStore8Imm, SBrii, su8_imm>;
179-
defm : WramStoreImmPat<WramStore16Imm, SHrii, su16_imm>;
180-
defm : WramStoreImmPat<WramStore32Imm, SWrii, s16_imm>;
181-
182-
def mram_load : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
183-
return (cast<LoadSDNode>(N)->getExtensionType() == ISD::NON_EXTLOAD) && IsALoadFromAddrSpace(N, DPUADDR_SPACE::MRAM);
184-
}]>;
185-
186-
def mram_extload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
187-
return (cast<LoadSDNode>(N)->getExtensionType() == ISD::EXTLOAD) && IsALoadFromAddrSpace(N, DPUADDR_SPACE::MRAM);
188-
}]>;
189-
190-
def mram_zextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
191-
return (cast<LoadSDNode>(N)->getExtensionType() == ISD::ZEXTLOAD) && IsALoadFromAddrSpace(N, DPUADDR_SPACE::MRAM);
192-
}]>;
193-
194-
def mram_sextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
195-
return (cast<LoadSDNode>(N)->getExtensionType() == ISD::SEXTLOAD) && IsALoadFromAddrSpace(N, DPUADDR_SPACE::MRAM);
196-
}]>;
197-
198-
def mram_extloadi8 : PatFrag<(ops node:$ptr), (mram_extload node:$ptr), [{
199-
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
200-
}]>;
201-
202-
def mram_extloadi16 : PatFrag<(ops node:$ptr), (mram_extload node:$ptr), [{
203-
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
204-
}]>;
205-
206-
def mram_extloadi32 : PatFrag<(ops node:$ptr), (mram_extload node:$ptr), [{
207-
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
208-
}]>;
209-
210-
def mram_sextloadi8 : PatFrag<(ops node:$ptr), (mram_sextload node:$ptr), [{
211-
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
212-
}]>;
213-
214-
def mram_sextloadi16 : PatFrag<(ops node:$ptr), (mram_sextload node:$ptr), [{
215-
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
216-
}]>;
217-
218-
def mram_sextloadi32 : PatFrag<(ops node:$ptr), (mram_sextload node:$ptr), [{
219-
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
220-
}]>;
221-
222-
def mram_zextloadi8 : PatFrag<(ops node:$ptr), (mram_zextload node:$ptr), [{
223-
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
224-
}]>;
225-
226-
def mram_zextloadi16 : PatFrag<(ops node:$ptr), (mram_zextload node:$ptr), [{
227-
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
228-
}]>;
229-
230-
def mram_zextloadi32 : PatFrag<(ops node:$ptr), (mram_zextload node:$ptr), [{
231-
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
232-
}]>;
167+
defm : WramStoreImmPat<truncstorei8, SBrii, su8_imm>;
168+
defm : WramStoreImmPat<truncstorei16, SHrii, su16_imm>;
169+
defm : WramStoreImmPat<store, SWrii, s16_imm>;
233170

234171
// Special instructions for 64 bits emulation.
235172

@@ -537,34 +474,60 @@ def : Pat<(i32 (DPUWrapper tglobaladdr :$dst)), (MOVEri tglobaladdr :$dst)>;
537474
def : Pat<(i32 (DPUWrapper texternalsym:$dst)), (MOVEri texternalsym:$dst)>;
538475
def : Pat<(i32 (DPUWrapper tblockaddress:$dst)), (MOVEri tblockaddress:$dst)>;
539476

540-
// -----------------------------------------------------------------------------
541-
// LOAD/STORE
542-
// -----------------------------------------------------------------------------
477+
//===----------------------------------------------------------------------===//
478+
// Software cache instructions
479+
//===----------------------------------------------------------------------===//
480+
def mram_load : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
481+
return (cast<LoadSDNode>(N)->getExtensionType() == ISD::NON_EXTLOAD) && IsALoadFromAddrSpace(N, DPUADDR_SPACE::MRAM);
482+
}]>;
543483

544-
let isAsCheapAsAMove = 0, mayStore = 1, usesCustomInserter = 1 in {
545-
def WRAM_STORE_DOUBLErm: PseudoDPUInstruction<
546-
(outs), (ins GP64_REG:$db, MEMri24:$addr),
547-
"",
548-
[(WramStore64 i64:$db, ADDRESS_IN_STACK:$addr)]
549-
>;
550-
def WRAM_STORE_DOUBLE_ALIGNEDrm: PseudoDPUInstruction<
551-
(outs), (ins GP64_REG:$db, MEMri24:$addr),
552-
"",
553-
[(WramStore64Aligned i64:$db, ADDRESS_IN_STACK:$addr)]
554-
>;
555-
def WRAM_STORE_DOUBLEim: PseudoDPUInstruction<
556-
(outs), (ins i64imm:$imm, MEMri24:$addr),
557-
"",
558-
[(WramStore64Imm (i64 imm:$imm), ADDRESS_IN_STACK:$addr)]
559-
>;
560-
}
484+
def mram_extload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
485+
return (cast<LoadSDNode>(N)->getExtensionType() == ISD::EXTLOAD) && IsALoadFromAddrSpace(N, DPUADDR_SPACE::MRAM);
486+
}]>;
561487

562-
let usesCustomInserter = 1 in {
563-
def WRAM_LOAD_DOUBLErm : PseudoDPUInstruction<
564-
(outs GP64_REG:$dc), (ins MEMri24:$addr),
565-
"",
566-
[(set i64:$dc, (wram_loadi64 ADDRESS_IN_STACK:$addr))]>;
567-
}
488+
def mram_zextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
489+
return (cast<LoadSDNode>(N)->getExtensionType() == ISD::ZEXTLOAD) && IsALoadFromAddrSpace(N, DPUADDR_SPACE::MRAM);
490+
}]>;
491+
492+
def mram_sextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
493+
return (cast<LoadSDNode>(N)->getExtensionType() == ISD::SEXTLOAD) && IsALoadFromAddrSpace(N, DPUADDR_SPACE::MRAM);
494+
}]>;
495+
496+
def mram_extloadi8 : PatFrag<(ops node:$ptr), (mram_extload node:$ptr), [{
497+
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
498+
}]>;
499+
500+
def mram_extloadi16 : PatFrag<(ops node:$ptr), (mram_extload node:$ptr), [{
501+
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
502+
}]>;
503+
504+
def mram_extloadi32 : PatFrag<(ops node:$ptr), (mram_extload node:$ptr), [{
505+
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
506+
}]>;
507+
508+
def mram_sextloadi8 : PatFrag<(ops node:$ptr), (mram_sextload node:$ptr), [{
509+
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
510+
}]>;
511+
512+
def mram_sextloadi16 : PatFrag<(ops node:$ptr), (mram_sextload node:$ptr), [{
513+
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
514+
}]>;
515+
516+
def mram_sextloadi32 : PatFrag<(ops node:$ptr), (mram_sextload node:$ptr), [{
517+
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
518+
}]>;
519+
520+
def mram_zextloadi8 : PatFrag<(ops node:$ptr), (mram_zextload node:$ptr), [{
521+
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
522+
}]>;
523+
524+
def mram_zextloadi16 : PatFrag<(ops node:$ptr), (mram_zextload node:$ptr), [{
525+
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
526+
}]>;
527+
528+
def mram_zextloadi32 : PatFrag<(ops node:$ptr), (mram_zextload node:$ptr), [{
529+
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
530+
}]>;
568531

569532
def mram_store : PatFrag<(ops node:$val, node:$ptr),
570533
(unindexedstore node:$val, node:$ptr), [{
@@ -592,9 +555,6 @@ def mram_truncstorei32 : PatFrag<(ops node:$val, node:$ptr),
592555
IsAStoreToAddrSpace(N, (unsigned int) DPUADDR_SPACE::MRAM);
593556
}]>;
594557

595-
//===----------------------------------------------------------------------===//
596-
// Software cache instructions
597-
//===----------------------------------------------------------------------===//
598558
let usesCustomInserter = 1 in {
599559
class MRAM_STORE_X_rm<PatFrag OpNode> : PseudoDPUInstruction<
600560
(outs), (ins GP_REG:$rb, MEMri24:$addr),
@@ -622,7 +582,7 @@ let usesCustomInserter = 1 in {
622582
def MRAM_STORE_DOUBLErm: PseudoDPUInstruction<
623583
(outs), (ins GP64_REG:$db, MEMri24:$addr),
624584
"",
625-
[(MramStore64 i64:$db, ADDRESS_IN_STACK:$addr)]
585+
[(mram_store i64:$db, ADDRESS_IN_STACK:$addr)]
626586
>;
627587

628588
def MRAM_LOADmr : MRAM_LOAD_X_mr<mram_load>;

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