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[PowerPC] Support conversion between f16 and f128 (llvm#130158)
Enables conversion between f16 and f128. Expanding on pre-Power9 targets and using HW instructions on Power9. Fixes llvm#92866 Commandeer of: llvm#97677 --------- Co-authored-by: esmeyi <esme.yi@ibm.com> (cherry picked from commit ade22fc)
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5 files changed

+215
-300
lines changed

5 files changed

+215
-300
lines changed

llvm/lib/IR/RuntimeLibcalls.cpp

+1
Original file line numberDiff line numberDiff line change
@@ -82,6 +82,7 @@ void RuntimeLibcallsInfo::initLibcalls(const Triple &TT) {
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setLibcallName(RTLIB::POWI_F128, "__powikf2");
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setLibcallName(RTLIB::FPEXT_F32_F128, "__extendsfkf2");
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setLibcallName(RTLIB::FPEXT_F64_F128, "__extenddfkf2");
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setLibcallName(RTLIB::FPROUND_F128_F16, "__trunckfhf2");
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setLibcallName(RTLIB::FPROUND_F128_F32, "__trunckfsf2");
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setLibcallName(RTLIB::FPROUND_F128_F64, "__trunckfdf2");
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setLibcallName(RTLIB::FPTOSINT_F128_I32, "__fixkfsi");

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

+6
Original file line numberDiff line numberDiff line change
@@ -223,13 +223,19 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM,
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setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand);
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}
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setTruncStoreAction(MVT::f128, MVT::f16, Expand);
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setOperationAction(ISD::FP_TO_FP16, MVT::f128, Expand);
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if (Subtarget.isISA3_0()) {
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setLoadExtAction(ISD::EXTLOAD, MVT::f128, MVT::f16, Legal);
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setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Legal);
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setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Legal);
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setTruncStoreAction(MVT::f64, MVT::f16, Legal);
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setTruncStoreAction(MVT::f32, MVT::f16, Legal);
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} else {
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// No extending loads from f16 or HW conversions back and forth.
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setLoadExtAction(ISD::EXTLOAD, MVT::f128, MVT::f16, Expand);
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setOperationAction(ISD::FP16_TO_FP, MVT::f128, Expand);
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setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Expand);
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setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand);
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setOperationAction(ISD::FP_TO_FP16, MVT::f64, Expand);

llvm/lib/Target/PowerPC/PPCInstrVSX.td

+4
Original file line numberDiff line numberDiff line change
@@ -3997,6 +3997,8 @@ defm : ScalToVecWPermute<
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(SUBREG_TO_REG (i64 1), (VEXTSH2Ds (LXSIHZX ForceXForm:$src)), sub_64)>;
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// Load/convert and convert/store patterns for f16.
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def : Pat<(f128 (extloadf16 ForceXForm:$src)),
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(f128 (XSCVDPQP (XSCVHPDP (LXSIHZX ForceXForm:$src))))>;
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def : Pat<(f64 (extloadf16 ForceXForm:$src)),
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(f64 (XSCVHPDP (LXSIHZX ForceXForm:$src)))>;
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def : Pat<(truncstoref16 f64:$src, ForceXForm:$dst),
@@ -4005,6 +4007,8 @@ def : Pat<(f32 (extloadf16 ForceXForm:$src)),
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(f32 (COPY_TO_REGCLASS (XSCVHPDP (LXSIHZX ForceXForm:$src)), VSSRC))>;
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def : Pat<(truncstoref16 f32:$src, ForceXForm:$dst),
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(STXSIHX (XSCVDPHP (COPY_TO_REGCLASS $src, VSFRC)), ForceXForm:$dst)>;
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def : Pat<(f128 (f16_to_fp i32:$A)),
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(f128 (XSCVDPQP (XSCVHPDP (MTVSRWZ $A))))>;
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def : Pat<(f64 (f16_to_fp i32:$A)),
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(f64 (XSCVHPDP (MTVSRWZ $A)))>;
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def : Pat<(f32 (f16_to_fp i32:$A)),

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