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1 parent 21b5785 commit b865df4Copy full SHA for b865df4
src/serial.rs
@@ -192,6 +192,9 @@ where
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// Enable DMA
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usart.cr3.write(|w| w.dmat().enabled().dmar().enabled());
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+ // Configure hardware flow control
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+ usart.cr3.write(|w| w.ctse().bit(config.cts_enabled).rtse().bit(config.rts_enabled));
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+
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Serial { usart, pins }
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}
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@@ -438,7 +441,8 @@ pub struct Config {
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pub sysclock: bool,
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pub parity: Parity,
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pub data_bits: DataBits,
-
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+ pub cts_enabled: bool,
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+ pub rts_enabled: bool,
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pub enum Oversampling {
@@ -479,6 +483,8 @@ impl Default for Config {
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sysclock: false,
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parity: Parity::ParityNone,
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data_bits: DataBits::Bits8,
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+ cts_enabled: false,
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+ rts_enabled: false,
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