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Commit f01d63d

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daymdaym
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Support Turin.
Fixes <#122>.
1 parent 8c774bd commit f01d63d

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5 files changed

+1373
-63
lines changed

5 files changed

+1373
-63
lines changed

‎rust-toolchain

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,3 @@
11
[toolchain]
2-
channel = "nightly-2024-02-09"
2+
channel = "nightly-2024-06-19"
33
components = [ "rustfmt", "rust-src" ]

‎src/apcb.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -400,7 +400,7 @@ impl<'a> Apcb<'a> {
400400
const ROME_VERSION: u16 = 0x30;
401401
const V3_HEADER_EXT_SIZE: usize =
402402
size_of::<V2_HEADER>() + size_of::<V3_HEADER_EXT>();
403-
pub const MAX_SIZE: usize = 0x5000;
403+
pub const MAX_SIZE: usize = 0x6500;
404404

405405
pub fn header(&self) -> Result<LayoutVerified<&[u8], V2_HEADER>> {
406406
LayoutVerified::<&[u8], V2_HEADER>::new_unaligned_from_prefix(

‎src/entry.rs

+91-18
Original file line numberDiff line numberDiff line change
@@ -439,6 +439,7 @@ impl<'a> schemars::JsonSchema for EntryItem<'a> {
439439
gen: &mut schemars::gen::SchemaGenerator,
440440
) -> schemars::schema::Schema {
441441
use crate::fch;
442+
use crate::gnb;
442443
use crate::memory;
443444
use crate::psp;
444445
use crate::tokens_entry::TokensEntryItem;
@@ -502,14 +503,14 @@ impl<'a> schemars::JsonSchema for EntryItem<'a> {
502503
"Ddr5CaPinMapElement".to_owned(),
503504
<Vec<memory::Ddr5CaPinMapElement>>::json_schema(gen),
504505
);
505-
obj.properties.insert(
506-
"MemDfeSearchElement20".to_owned(),
507-
<Vec<memory::MemDfeSearchElement20>>::json_schema(gen),
508-
);
509506
obj.properties.insert(
510507
"MemDfeSearchElement32".to_owned(),
511508
<Vec<memory::MemDfeSearchElement32>>::json_schema(gen),
512509
);
510+
obj.properties.insert(
511+
"MemDfeSearchElement36".to_owned(),
512+
<Vec<memory::MemDfeSearchElement36>>::json_schema(gen),
513+
);
513514
obj.properties.insert(
514515
"DdrDqPinMapElement".to_owned(),
515516
<Vec<memory::DdrDqPinMapElement>>::json_schema(gen),
@@ -544,6 +545,22 @@ impl<'a> schemars::JsonSchema for EntryItem<'a> {
544545
);
545546
obj.properties
546547
.insert("EspiInit".to_owned(), <fch::EspiInit>::json_schema(gen));
548+
obj.properties.insert(
549+
"PmuBistVendorAlgorithmElement".to_owned(),
550+
<Vec<memory::PmuBistVendorAlgorithmElement>>::json_schema(gen),
551+
);
552+
obj.properties.insert(
553+
"Ddr5RawCardConfigElement".to_owned(),
554+
<Vec<memory::Ddr5RawCardConfigElement>>::json_schema(gen),
555+
);
556+
obj.properties.insert(
557+
"EspiSioInitElement".to_owned(),
558+
<Vec<fch::EspiSioInitElement>>::json_schema(gen),
559+
);
560+
obj.properties.insert(
561+
"EarlyPcieConfigElement".to_owned(),
562+
<Vec<gnb::EarlyPcieConfigElement>>::json_schema(gen),
563+
);
547564
obj.properties
548565
.insert("BoardIdGettingMethodGpio".to_owned(),
549566
<(psp::BoardIdGettingMethodGpio,
@@ -607,6 +624,7 @@ impl<'a> Serialize for EntryItem<'a> {
607624
{
608625
use crate::df::SlinkConfig;
609626
use crate::fch;
627+
use crate::gnb;
610628
use crate::memory;
611629
use crate::psp;
612630
let mut state = serializer.serialize_struct("EntryItem", 2)?;
@@ -659,12 +677,12 @@ impl<'a> Serialize for EntryItem<'a> {
659677
} else if let Some(s) = self.body_as_struct_array::<memory::Ddr5CaPinMapElement>() {
660678
let v = s.iter().collect::<Vec<_>>();
661679
state.serialize_field("Ddr5CaPinMapElement", &v)?;
662-
} else if let Some(s) = self.body_as_struct_array::<memory::MemDfeSearchElement20>() {
663-
let v = s.iter().collect::<Vec<_>>();
664-
state.serialize_field("MemDfeSearchElement20", &v)?;
665-
} else if let Some(s) = self.body_as_struct_array::<memory::MemDfeSearchElement32>() {
680+
// } else if let Some(s) = self.body_as_struct_array::<memory::MemDfeSearchElement32>() { // UH OH
681+
// let v = s.iter().collect::<Vec<_>>();
682+
// state.serialize_field("MemDfeSearchElement32", &v)?;
683+
} else if let Some(s) = self.body_as_struct_array::<memory::MemDfeSearchElement36>() {
666684
let v = s.iter().collect::<Vec<_>>();
667-
state.serialize_field("MemDfeSearchElement32", &v)?;
685+
state.serialize_field("MemDfeSearchElement36", &v)?;
668686
} else if let Some(s) = self.body_as_struct_array::<memory::DdrDqPinMapElement>() {
669687
let v = s.iter().collect::<Vec<_>>();
670688
state.serialize_field("DdrDqPinMapElement", &v)?;
@@ -701,6 +719,18 @@ impl<'a> Serialize for EntryItem<'a> {
701719
state.serialize_field("BoardIdGettingMethodCustom", &t)?;
702720
} else if let Some((header, _)) = self.body_as_struct::<fch::EspiInit>() {
703721
state.serialize_field("EspiInit", &header)?;
722+
} else if let Some(s) = self.body_as_struct_array::<memory::PmuBistVendorAlgorithmElement>() {
723+
let v = s.iter().collect::<Vec<_>>();
724+
state.serialize_field("PmuBistVendorAlgorithmElement", &v)?;
725+
} else if let Some(s) = self.body_as_struct_array::<memory::Ddr5RawCardConfigElement>() {
726+
let v = s.iter().collect::<Vec<_>>();
727+
state.serialize_field("Ddr5RawCardConfigElement", &v)?;
728+
} else if let Some(s) = self.body_as_struct_array::<fch::EspiSioInitElement>() { // TODO terminator, so variant
729+
let v = s.iter().collect::<Vec<_>>();
730+
state.serialize_field("EspiSioInitElement", &v)?;
731+
} else if let Some(s) = self.body_as_struct_array::<gnb::EarlyPcieConfigElement>() {
732+
let v = s.iter().collect::<Vec<_>>();
733+
state.serialize_field("EarlyPcieConfigElement", &v)?;
704734
} else if let Some(s) =
705735
self.body_as_struct_sequence::<memory::platform_specific_override::ElementRef<'_>>() {
706736
let i = s.iter().unwrap();
@@ -896,9 +926,11 @@ impl<'de> Deserialize<'de> for SerdeEntryItem {
896926
LrMaxFreqElement,
897927
DdrDqPinMapElement,
898928
Ddr5CaPinMapElement,
899-
MemDfeSearchElement20,
900929
MemDfeSearchElement32,
930+
MemDfeSearchElement36,
901931
RdimmDdr5BusElement,
932+
EspiSioInitElement, // FIXME move to struct sequence (maybe)
933+
EarlyPcieConfigElement,
902934

903935
// Body as struct
904936
ConsoleOutControl,
@@ -911,6 +943,8 @@ impl<'de> Deserialize<'de> for SerdeEntryItem {
911943
BoardIdGettingMethodSmbus,
912944
BoardIdGettingMethodCustom,
913945
EspiInit,
946+
PmuBistVendorAlgorithmElement,
947+
Ddr5RawCardConfigElement,
914948

915949
// struct sequence
916950
PlatformSpecificOverrides,
@@ -933,9 +967,11 @@ impl<'de> Deserialize<'de> for SerdeEntryItem {
933967
"LrMaxFreqElement",
934968
"DdrDqPinMapElement",
935969
"Ddr5CaPinMapElement",
936-
"MemDfeSearchElement20",
937970
"MemDfeSearchElement32",
971+
"MemDfeSearchElement36",
938972
"RdimmDdr5BusElement",
973+
"EspiSioInitElement",
974+
"EarlyPcieConfigElement",
939975
// Body as struct
940976
"ConsoleOutControl",
941977
"ExtVoltageControl",
@@ -947,6 +983,8 @@ impl<'de> Deserialize<'de> for SerdeEntryItem {
947983
"BoardIdGettingMethodSmbus",
948984
"BoardIdGettingMethodCustom",
949985
"EspiInit",
986+
"PmuBistVendorAlgorithmElement",
987+
"Ddr5RawCardConfigElement",
950988
// struct sequence
951989
"platform_specific_overrides",
952990
"platform_tuning",
@@ -1015,15 +1053,21 @@ impl<'de> Deserialize<'de> for SerdeEntryItem {
10151053
"Ddr5CaPinMapElement" => {
10161054
Ok(Field::Ddr5CaPinMapElement)
10171055
}
1018-
"MemDfeSearchElement20" => {
1019-
Ok(Field::MemDfeSearchElement20)
1020-
}
10211056
"MemDfeSearchElement32" => {
10221057
Ok(Field::MemDfeSearchElement32)
10231058
}
1059+
"MemDfeSearchElement36" => {
1060+
Ok(Field::MemDfeSearchElement36)
1061+
}
10241062
"RdimmDdr5BusElement" => {
10251063
Ok(Field::RdimmDdr5BusElement)
10261064
}
1065+
"EspiSioInitElement" => {
1066+
Ok(Field::EspiSioInitElement)
1067+
}
1068+
"EarlyPcieConfigElement" => {
1069+
Ok(Field::EarlyPcieConfigElement)
1070+
}
10271071

10281072
"ConsoleOutControl" => Ok(Field::ConsoleOutControl),
10291073
"ExtVoltageControl" => Ok(Field::ExtVoltageControl),
@@ -1047,6 +1091,12 @@ impl<'de> Deserialize<'de> for SerdeEntryItem {
10471091
Ok(Field::BoardIdGettingMethodCustom)
10481092
}
10491093
"EspiInit" => Ok(Field::EspiInit),
1094+
"PmuBistVendorAlgorithmElement" => {
1095+
Ok(Field::PmuBistVendorAlgorithmElement)
1096+
}
1097+
"Ddr5RawCardConfigElement" => {
1098+
Ok(Field::Ddr5RawCardConfigElement)
1099+
}
10501100
"platform_specific_overrides" => {
10511101
Ok(Field::PlatformSpecificOverrides)
10521102
}
@@ -1082,6 +1132,7 @@ impl<'de> Deserialize<'de> for SerdeEntryItem {
10821132
{
10831133
use crate::df;
10841134
use crate::fch;
1135+
use crate::gnb;
10851136
use crate::memory;
10861137
use crate::psp;
10871138
let mut header: Option<ENTRY_HEADER> = None;
@@ -1171,15 +1222,15 @@ impl<'de> Deserialize<'de> for SerdeEntryItem {
11711222
&mut body, &mut map,
11721223
)?;
11731224
}
1174-
Field::MemDfeSearchElement20 => {
1225+
Field::MemDfeSearchElement32 => {
11751226
struct_vec_to_body::<
1176-
memory::MemDfeSearchElement20,
1227+
memory::MemDfeSearchElement32,
11771228
V,
11781229
>(&mut body, &mut map)?;
11791230
}
1180-
Field::MemDfeSearchElement32 => {
1231+
Field::MemDfeSearchElement36 => {
11811232
struct_vec_to_body::<
1182-
memory::MemDfeSearchElement32,
1233+
memory::MemDfeSearchElement36,
11831234
V,
11841235
>(&mut body, &mut map)?;
11851236
}
@@ -1239,6 +1290,28 @@ impl<'de> Deserialize<'de> for SerdeEntryItem {
12391290
&mut body, &mut map,
12401291
)?;
12411292
}
1293+
Field::PmuBistVendorAlgorithmElement => {
1294+
struct_vec_to_body::<
1295+
memory::PmuBistVendorAlgorithmElement,
1296+
V,
1297+
>(&mut body, &mut map)?;
1298+
}
1299+
Field::Ddr5RawCardConfigElement => {
1300+
struct_vec_to_body::<
1301+
memory::Ddr5RawCardConfigElement,
1302+
V,
1303+
>(&mut body, &mut map)?;
1304+
}
1305+
Field::EspiSioInitElement => {
1306+
struct_vec_to_body::<fch::EspiSioInitElement, V>(
1307+
&mut body, &mut map,
1308+
)?;
1309+
}
1310+
Field::EarlyPcieConfigElement => {
1311+
struct_vec_to_body::<gnb::EarlyPcieConfigElement, V>(
1312+
&mut body, &mut map,
1313+
)?;
1314+
}
12421315

12431316
Field::PlatformSpecificOverrides => {
12441317
struct_sequence_to_body::<

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