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Followup to #123623 which added a fall through operand to X86ISD::BSF/BSR nodes to handle 'src is zero' behavior on supported CPUs.
We can use the fall through for other cases than the bitwidth constant values which we currently handle.
There are a couple of gotchas to address:
Must still be limited to CPUs that support fall through on BSF/BSR instructions
The "REP BSF" -> TZCNT performance hack in X86MCInstLower::Lower will need adjusting to only work for undef / correct constants
Additional tests (both for constant and variable fall through values) will be necessary as we can't guarantee that 32-bit BSR/BSF instructions correctly zero the upper 32-bits of a register
The text was updated successfully, but these errors were encountered:
Followup to #123623 which added a fall through operand to X86ISD::BSF/BSR nodes to handle 'src is zero' behavior on supported CPUs.
We can use the fall through for other cases than the bitwidth constant values which we currently handle.
There are a couple of gotchas to address:
Must still be limited to CPUs that support fall through on BSF/BSR instructions
The "REP BSF" -> TZCNT performance hack in X86MCInstLower::Lower will need adjusting to only work for undef / correct constants
Additional tests (both for constant and variable fall through values) will be necessary as we can't guarantee that 32-bit BSR/BSF instructions correctly zero the upper 32-bits of a register
Followup to #123623 which added a fall through operand to X86ISD::BSF/BSR nodes to handle 'src is zero' behavior on supported CPUs.
We can use the fall through for other cases than the bitwidth constant values which we currently handle.
There are a couple of gotchas to address:
The text was updated successfully, but these errors were encountered: