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+22
-6
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2 files changed

+22
-6
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llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp

+20-4
Original file line numberDiff line numberDiff line change
@@ -163,11 +163,23 @@ class AArch64AsmPrinter : public AsmPrinter {
163163
void emitPtrauthAuthResign(const MachineInstr *MI);
164164

165165
// Emit the sequence to compute the discriminator.
166+
//
166167
// ScratchReg should be x16/x17.
168+
//
167169
// The returned register is either unmodified AddrDisc or x16/x17.
170+
//
168171
// If the expanded pseudo is allowed to clobber AddrDisc register, setting
169172
// MayUseAddrAsScratch may save one MOV instruction, provided the address
170-
// is already in x16/x17.
173+
// is already in x16/x17 (i.e. return x16/x17 which is the *modified* AddrDisc
174+
// register at the same time):
175+
//
176+
// mov x17, x16
177+
// movk x17, #1234, lsl #48
178+
// ; x16 is not used anymore
179+
//
180+
// can be replaced by
181+
//
182+
// movk x16, #1234, lsl #48
171183
Register emitPtrauthDiscriminator(uint16_t Disc, Register AddrDisc,
172184
Register ScratchReg,
173185
bool MayUseAddrAsScratch = false);
@@ -1737,6 +1749,7 @@ Register AArch64AsmPrinter::emitPtrauthDiscriminator(uint16_t Disc,
17371749
Register AddrDisc,
17381750
Register ScratchReg,
17391751
bool MayUseAddrAsScratch) {
1752+
assert(ScratchReg == AArch64::X16 || ScratchReg == AArch64::X17);
17401753
// So far we've used NoRegister in pseudos. Now we need real encodings.
17411754
if (AddrDisc == AArch64::NoRegister)
17421755
AddrDisc = AArch64::XZR;
@@ -2062,10 +2075,13 @@ void AArch64AsmPrinter::emitPtrauthBranch(const MachineInstr *MI) {
20622075
if (BrTarget == AddrDisc)
20632076
report_fatal_error("Branch target is signed with its own value");
20642077

2065-
// x16 and x17 are implicit-def'ed by MI, and AddrDisc is not used as any
2066-
// other input, so try to save one MOV by setting MayUseAddrAsScratch.
2078+
// If we are printing BLRA pseudo instruction, then x16 and x17 are
2079+
// implicit-def'ed by the MI and AddrDisc is not used as any other input, so
2080+
// try to save one MOV by setting MayUseAddrAsScratch.
2081+
// Unlike BLRA, BRA pseudo is used to perform computed goto, and thus not
2082+
// declared as clobbering x16/x17.
20672083
Register DiscReg = emitPtrauthDiscriminator(Disc, AddrDisc, AArch64::X17,
2068-
/*MayUseAddrAsScratch=*/true);
2084+
/*MayUseAddrAsScratch=*/IsCall);
20692085
bool IsZeroDisc = DiscReg == AArch64::XZR;
20702086

20712087
unsigned Opc;

llvm/lib/Target/AArch64/AArch64InstrInfo.td

+2-2
Original file line numberDiff line numberDiff line change
@@ -1870,7 +1870,7 @@ let Predicates = [HasPAuth] in {
18701870
// This directly manipulates x16/x17, which are the only registers the OS
18711871
// guarantees are safe to use for sensitive operations.
18721872
def BRA : Pseudo<(outs), (ins GPR64noip:$Rn, i32imm:$Key, i64imm:$Disc,
1873-
GPR64:$AddrDisc), []>, Sched<[]> {
1873+
GPR64noip:$AddrDisc), []>, Sched<[]> {
18741874
let isCodeGenOnly = 1;
18751875
let hasNoSchedulingInfo = 1;
18761876
let hasSideEffects = 1;
@@ -1881,7 +1881,7 @@ let Predicates = [HasPAuth] in {
18811881
let isBarrier = 1;
18821882
let isIndirectBranch = 1;
18831883
let Size = 12; // 4 fixed + 8 variable, to compute discriminator.
1884-
let Defs = [X16,X17];
1884+
let Defs = [X17];
18851885
}
18861886

18871887
let isReturn = 1, isTerminator = 1, isBarrier = 1 in {

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