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Revert "[JumpThreading] Thread over BB with only an unconditional branch" (#88907)
Reverts #86312
1 parent b632476 commit d2d4a1b

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9 files changed

+126
-284
lines changed

9 files changed

+126
-284
lines changed

‎llvm/lib/Transforms/Utils/Local.cpp

+4-6
Original file line numberDiff line numberDiff line change
@@ -1019,14 +1019,12 @@ CanRedirectPredsOfEmptyBBToSucc(BasicBlock *BB, BasicBlock *Succ,
10191019
const SmallPtrSetImpl<BasicBlock *> &SuccPreds,
10201020
BasicBlock *&CommonPred) {
10211021

1022-
// When Succ has no phis, BB may be merged into Succ directly. We don't need
1023-
// to redirect the predecessors of BB in this case.
1024-
if (Succ->phis().empty())
1022+
// There must be phis in BB, otherwise BB will be merged into Succ directly
1023+
if (BB->phis().empty() || Succ->phis().empty())
10251024
return false;
10261025

1027-
// BB must have multiple different predecessors, so that at least one of
1028-
// predecessors can be redirected to Succ, except the common predecessor.
1029-
if (BB->getUniquePredecessor() || pred_empty(BB))
1026+
// BB must have predecessors not shared that can be redirected to Succ
1027+
if (!BB->hasNPredecessorsOrMore(2))
10301028
return false;
10311029

10321030
// Get single common predecessors of both BB and Succ

‎llvm/test/CodeGen/AArch64/and-sink.ll

+5-4
Original file line numberDiff line numberDiff line change
@@ -11,14 +11,15 @@
1111
define dso_local i32 @and_sink1(i32 %a, i1 %c) {
1212
; CHECK-LABEL: and_sink1:
1313
; CHECK: // %bb.0:
14-
; CHECK-NEXT: tbz w1, #0, .LBB0_2
14+
; CHECK-NEXT: tbz w1, #0, .LBB0_3
1515
; CHECK-NEXT: // %bb.1: // %bb0
16-
; CHECK-NEXT: tst w0, #0x4
1716
; CHECK-NEXT: adrp x8, A
18-
; CHECK-NEXT: cset w0, eq
1917
; CHECK-NEXT: str wzr, [x8, :lo12:A]
18+
; CHECK-NEXT: tbnz w0, #2, .LBB0_3
19+
; CHECK-NEXT: // %bb.2:
20+
; CHECK-NEXT: mov w0, #1 // =0x1
2021
; CHECK-NEXT: ret
21-
; CHECK-NEXT: .LBB0_2:
22+
; CHECK-NEXT: .LBB0_3: // %bb2
2223
; CHECK-NEXT: mov w0, wzr
2324
; CHECK-NEXT: ret
2425

‎llvm/test/CodeGen/AArch64/combine-comparisons-by-cse.ll

+72-50
Original file line numberDiff line numberDiff line change
@@ -13,10 +13,10 @@ define i32 @combine_gt_ge_10() #0 {
1313
; CHECK: // %bb.0: // %entry
1414
; CHECK-NEXT: adrp x8, :got:a
1515
; CHECK-NEXT: ldr x8, [x8, :got_lo12:a]
16-
; CHECK-NEXT: ldr w9, [x8]
16+
; CHECK-NEXT: ldr w8, [x8]
17+
; CHECK-NEXT: cmp w8, #10
1718
; CHECK-NEXT: adrp x8, :got:b
1819
; CHECK-NEXT: ldr x8, [x8, :got_lo12:b]
19-
; CHECK-NEXT: cmp w9, #10
2020
; CHECK-NEXT: b.le .LBB0_3
2121
; CHECK-NEXT: // %bb.1: // %land.lhs.true
2222
; CHECK-NEXT: adrp x9, :got:c
@@ -29,17 +29,18 @@ define i32 @combine_gt_ge_10() #0 {
2929
; CHECK-NEXT: mov w0, #1 // =0x1
3030
; CHECK-NEXT: ret
3131
; CHECK-NEXT: .LBB0_3: // %lor.lhs.false
32-
; CHECK-NEXT: cmp w9, #10
33-
; CHECK-NEXT: b.lt .LBB0_5
32+
; CHECK-NEXT: b.lt .LBB0_6
3433
; CHECK-NEXT: .LBB0_4: // %land.lhs.true3
3534
; CHECK-NEXT: adrp x9, :got:d
3635
; CHECK-NEXT: ldr x9, [x9, :got_lo12:d]
3736
; CHECK-NEXT: ldr w8, [x8]
3837
; CHECK-NEXT: ldr w9, [x9]
3938
; CHECK-NEXT: cmp w8, w9
40-
; CHECK-NEXT: cset w0, eq
39+
; CHECK-NEXT: b.ne .LBB0_6
40+
; CHECK-NEXT: // %bb.5:
41+
; CHECK-NEXT: mov w0, #1 // =0x1
4142
; CHECK-NEXT: ret
42-
; CHECK-NEXT: .LBB0_5:
43+
; CHECK-NEXT: .LBB0_6: // %if.end
4344
; CHECK-NEXT: mov w0, wzr
4445
; CHECK-NEXT: ret
4546
entry:
@@ -144,10 +145,10 @@ define i32 @combine_lt_ge_5() #0 {
144145
; CHECK: // %bb.0: // %entry
145146
; CHECK-NEXT: adrp x8, :got:a
146147
; CHECK-NEXT: ldr x8, [x8, :got_lo12:a]
147-
; CHECK-NEXT: ldr w9, [x8]
148+
; CHECK-NEXT: ldr w8, [x8]
149+
; CHECK-NEXT: cmp w8, #5
148150
; CHECK-NEXT: adrp x8, :got:b
149151
; CHECK-NEXT: ldr x8, [x8, :got_lo12:b]
150-
; CHECK-NEXT: cmp w9, #5
151152
; CHECK-NEXT: b.ge .LBB2_3
152153
; CHECK-NEXT: // %bb.1: // %land.lhs.true
153154
; CHECK-NEXT: adrp x9, :got:c
@@ -160,17 +161,18 @@ define i32 @combine_lt_ge_5() #0 {
160161
; CHECK-NEXT: mov w0, #1 // =0x1
161162
; CHECK-NEXT: ret
162163
; CHECK-NEXT: .LBB2_3: // %lor.lhs.false
163-
; CHECK-NEXT: cmp w9, #5
164-
; CHECK-NEXT: b.gt .LBB2_5
164+
; CHECK-NEXT: b.gt .LBB2_6
165165
; CHECK-NEXT: .LBB2_4: // %land.lhs.true3
166166
; CHECK-NEXT: adrp x9, :got:d
167167
; CHECK-NEXT: ldr x9, [x9, :got_lo12:d]
168168
; CHECK-NEXT: ldr w8, [x8]
169169
; CHECK-NEXT: ldr w9, [x9]
170170
; CHECK-NEXT: cmp w8, w9
171-
; CHECK-NEXT: cset w0, eq
171+
; CHECK-NEXT: b.ne .LBB2_6
172+
; CHECK-NEXT: // %bb.5:
173+
; CHECK-NEXT: mov w0, #1 // =0x1
172174
; CHECK-NEXT: ret
173-
; CHECK-NEXT: .LBB2_5:
175+
; CHECK-NEXT: .LBB2_6: // %if.end
174176
; CHECK-NEXT: mov w0, wzr
175177
; CHECK-NEXT: ret
176178
entry:
@@ -497,17 +499,24 @@ define i32 @do_nothing_if_resultant_opcodes_would_differ() #0 {
497499
; CHECK-NEXT: // %bb.3: // %while.cond.while.end_crit_edge
498500
; CHECK-NEXT: ldr w8, [x19]
499501
; CHECK-NEXT: .LBB7_4: // %while.end
500-
; CHECK-NEXT: adrp x9, :got:b
501-
; CHECK-NEXT: adrp x10, :got:d
502-
; CHECK-NEXT: ldr x9, [x9, :got_lo12:b]
503-
; CHECK-NEXT: ldr x10, [x10, :got_lo12:d]
504-
; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
502+
; CHECK-NEXT: cmp w8, #1
503+
; CHECK-NEXT: b.gt .LBB7_7
504+
; CHECK-NEXT: // %bb.5: // %land.lhs.true
505+
; CHECK-NEXT: adrp x8, :got:b
506+
; CHECK-NEXT: adrp x9, :got:d
507+
; CHECK-NEXT: ldr x8, [x8, :got_lo12:b]
508+
; CHECK-NEXT: ldr x9, [x9, :got_lo12:d]
509+
; CHECK-NEXT: ldr w8, [x8]
505510
; CHECK-NEXT: ldr w9, [x9]
506-
; CHECK-NEXT: ldr w10, [x10]
507-
; CHECK-NEXT: cmp w9, w10
508-
; CHECK-NEXT: ccmp w8, #2, #0, eq
509-
; CHECK-NEXT: mov w8, #123 // =0x7b
510-
; CHECK-NEXT: csel w0, w8, wzr, lt
511+
; CHECK-NEXT: cmp w8, w9
512+
; CHECK-NEXT: b.ne .LBB7_7
513+
; CHECK-NEXT: // %bb.6:
514+
; CHECK-NEXT: mov w0, #123 // =0x7b
515+
; CHECK-NEXT: b .LBB7_8
516+
; CHECK-NEXT: .LBB7_7: // %if.end
517+
; CHECK-NEXT: mov w0, wzr
518+
; CHECK-NEXT: .LBB7_8: // %return
519+
; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
511520
; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
512521
; CHECK-NEXT: .cfi_def_cfa_offset 0
513522
; CHECK-NEXT: .cfi_restore w19
@@ -555,42 +564,52 @@ return: ; preds = %if.end, %land.lhs.t
555564
define i32 @do_nothing_if_compares_can_not_be_adjusted_to_each_other() #0 {
556565
; CHECK-LABEL: do_nothing_if_compares_can_not_be_adjusted_to_each_other:
557566
; CHECK: // %bb.0: // %entry
567+
; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
568+
; CHECK-NEXT: .cfi_def_cfa_offset 16
569+
; CHECK-NEXT: .cfi_offset w19, -8
570+
; CHECK-NEXT: .cfi_offset w30, -16
571+
; CHECK-NEXT: .cfi_remember_state
558572
; CHECK-NEXT: adrp x8, :got:a
559573
; CHECK-NEXT: ldr x8, [x8, :got_lo12:a]
560574
; CHECK-NEXT: ldr w8, [x8]
561575
; CHECK-NEXT: cmp w8, #0
562-
; CHECK-NEXT: b.gt .LBB8_4
576+
; CHECK-NEXT: b.gt .LBB8_3
563577
; CHECK-NEXT: // %bb.1: // %while.body.preheader
564-
; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
565-
; CHECK-NEXT: .cfi_def_cfa_offset 16
566-
; CHECK-NEXT: .cfi_offset w19, -8
567-
; CHECK-NEXT: .cfi_offset w30, -16
568578
; CHECK-NEXT: sub w19, w8, #1
569579
; CHECK-NEXT: .LBB8_2: // %while.body
570580
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
571581
; CHECK-NEXT: bl do_something
572582
; CHECK-NEXT: adds w19, w19, #1
573583
; CHECK-NEXT: b.mi .LBB8_2
574-
; CHECK-NEXT: // %bb.3:
575-
; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
576-
; CHECK-NEXT: .cfi_def_cfa_offset 0
577-
; CHECK-NEXT: .cfi_restore w19
578-
; CHECK-NEXT: .cfi_restore w30
579-
; CHECK-NEXT: .LBB8_4: // %while.end
584+
; CHECK-NEXT: .LBB8_3: // %while.end
585+
; CHECK-NEXT: adrp x8, :got:c
586+
; CHECK-NEXT: ldr x8, [x8, :got_lo12:c]
587+
; CHECK-NEXT: ldr w8, [x8]
588+
; CHECK-NEXT: cmn w8, #2
589+
; CHECK-NEXT: b.lt .LBB8_6
590+
; CHECK-NEXT: // %bb.4: // %land.lhs.true
580591
; CHECK-NEXT: adrp x8, :got:b
581592
; CHECK-NEXT: adrp x9, :got:d
582-
; CHECK-NEXT: adrp x10, :got:c
583593
; CHECK-NEXT: ldr x8, [x8, :got_lo12:b]
584594
; CHECK-NEXT: ldr x9, [x9, :got_lo12:d]
585-
; CHECK-NEXT: ldr x10, [x10, :got_lo12:c]
586595
; CHECK-NEXT: ldr w8, [x8]
587596
; CHECK-NEXT: ldr w9, [x9]
588-
; CHECK-NEXT: ldr w10, [x10]
589597
; CHECK-NEXT: cmp w8, w9
590-
; CHECK-NEXT: mov w8, #-3 // =0xfffffffd
591-
; CHECK-NEXT: ccmp w10, w8, #4, eq
592-
; CHECK-NEXT: mov w8, #123 // =0x7b
593-
; CHECK-NEXT: csel w0, w8, wzr, gt
598+
; CHECK-NEXT: b.ne .LBB8_6
599+
; CHECK-NEXT: // %bb.5:
600+
; CHECK-NEXT: mov w0, #123 // =0x7b
601+
; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
602+
; CHECK-NEXT: .cfi_def_cfa_offset 0
603+
; CHECK-NEXT: .cfi_restore w19
604+
; CHECK-NEXT: .cfi_restore w30
605+
; CHECK-NEXT: ret
606+
; CHECK-NEXT: .LBB8_6: // %if.end
607+
; CHECK-NEXT: .cfi_restore_state
608+
; CHECK-NEXT: mov w0, wzr
609+
; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
610+
; CHECK-NEXT: .cfi_def_cfa_offset 0
611+
; CHECK-NEXT: .cfi_restore w19
612+
; CHECK-NEXT: .cfi_restore w30
594613
; CHECK-NEXT: ret
595614
entry:
596615
%0 = load i32, ptr @a, align 4
@@ -763,34 +782,37 @@ define i32 @combine_gt_ge_sel(i64 %v, ptr %p) #0 {
763782
; CHECK-NEXT: cmp w8, #0
764783
; CHECK-NEXT: csel x9, x0, xzr, gt
765784
; CHECK-NEXT: str x9, [x1]
766-
; CHECK-NEXT: b.le .LBB11_3
785+
; CHECK-NEXT: b.le .LBB11_2
767786
; CHECK-NEXT: // %bb.1: // %lor.lhs.false
768787
; CHECK-NEXT: cmp w8, #2
769-
; CHECK-NEXT: b.ge .LBB11_5
770-
; CHECK-NEXT: // %bb.2:
771-
; CHECK-NEXT: mov w0, wzr
772-
; CHECK-NEXT: ret
773-
; CHECK-NEXT: .LBB11_3: // %land.lhs.true
788+
; CHECK-NEXT: b.ge .LBB11_4
789+
; CHECK-NEXT: b .LBB11_6
790+
; CHECK-NEXT: .LBB11_2: // %land.lhs.true
774791
; CHECK-NEXT: adrp x8, :got:b
775792
; CHECK-NEXT: adrp x9, :got:c
776793
; CHECK-NEXT: ldr x8, [x8, :got_lo12:b]
777794
; CHECK-NEXT: ldr x9, [x9, :got_lo12:c]
778795
; CHECK-NEXT: ldr w8, [x8]
779796
; CHECK-NEXT: ldr w9, [x9]
780797
; CHECK-NEXT: cmp w8, w9
781-
; CHECK-NEXT: b.ne .LBB11_5
782-
; CHECK-NEXT: // %bb.4:
798+
; CHECK-NEXT: b.ne .LBB11_4
799+
; CHECK-NEXT: // %bb.3:
783800
; CHECK-NEXT: mov w0, #1 // =0x1
784801
; CHECK-NEXT: ret
785-
; CHECK-NEXT: .LBB11_5: // %land.lhs.true3
802+
; CHECK-NEXT: .LBB11_4: // %land.lhs.true3
786803
; CHECK-NEXT: adrp x8, :got:b
787804
; CHECK-NEXT: adrp x9, :got:d
788805
; CHECK-NEXT: ldr x8, [x8, :got_lo12:b]
789806
; CHECK-NEXT: ldr x9, [x9, :got_lo12:d]
790807
; CHECK-NEXT: ldr w8, [x8]
791808
; CHECK-NEXT: ldr w9, [x9]
792809
; CHECK-NEXT: cmp w8, w9
793-
; CHECK-NEXT: cset w0, eq
810+
; CHECK-NEXT: b.ne .LBB11_6
811+
; CHECK-NEXT: // %bb.5:
812+
; CHECK-NEXT: mov w0, #1 // =0x1
813+
; CHECK-NEXT: ret
814+
; CHECK-NEXT: .LBB11_6: // %if.end
815+
; CHECK-NEXT: mov w0, wzr
794816
; CHECK-NEXT: ret
795817
entry:
796818
%0 = load i32, ptr @a, align 4

‎llvm/test/CodeGen/Hexagon/vect/zext-v4i1.ll

+13-5
Original file line numberDiff line numberDiff line change
@@ -10,13 +10,12 @@ define i32 @fred(ptr %a0) #0 {
1010
; CHECK-LABEL: fred:
1111
; CHECK: // %bb.0: // %b0
1212
; CHECK-NEXT: {
13-
; CHECK-NEXT: r1:0 = combine(r0,#0)
14-
; CHECK-NEXT: if (p0) jumpr r31
13+
; CHECK-NEXT: if (p0) jump:nt .LBB0_2
1514
; CHECK-NEXT: }
16-
; CHECK-NEXT: .LBB0_1: // %b2
15+
; CHECK-NEXT: // %bb.1: // %b2
1716
; CHECK-NEXT: {
1817
; CHECK-NEXT: r3:2 = combine(#0,#0)
19-
; CHECK-NEXT: r1:0 = memd(r1+#0)
18+
; CHECK-NEXT: r1:0 = memd(r0+#0)
2019
; CHECK-NEXT: }
2120
; CHECK-NEXT: {
2221
; CHECK-NEXT: p0 = vcmph.eq(r1:0,r3:2)
@@ -28,7 +27,16 @@ define i32 @fred(ptr %a0) #0 {
2827
; CHECK-NEXT: r0 = and(r0,#1)
2928
; CHECK-NEXT: }
3029
; CHECK-NEXT: {
31-
; CHECK-NEXT: r0 = !cmp.eq(r0,#11)
30+
; CHECK-NEXT: p0 = cmp.eq(r0,#11)
31+
; CHECK-NEXT: r0 = #1
32+
; CHECK-NEXT: }
33+
; CHECK-NEXT: {
34+
; CHECK-NEXT: if (p0) r0 = #0
35+
; CHECK-NEXT: jumpr r31
36+
; CHECK-NEXT: }
37+
; CHECK-NEXT: .LBB0_2: // %b14
38+
; CHECK-NEXT: {
39+
; CHECK-NEXT: r0 = #0
3240
; CHECK-NEXT: jumpr r31
3341
; CHECK-NEXT: }
3442
b0:

‎llvm/test/Transforms/JumpThreading/pr79175.ll

+4-4
Original file line numberDiff line numberDiff line change
@@ -17,11 +17,11 @@ define i32 @test(i64 %idx, i32 %val) {
1717
; CHECK: cond.end:
1818
; CHECK-NEXT: [[CMP_I:%.*]] = icmp sgt i32 [[VAL]], 0
1919
; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[CMP_I]]
20-
; CHECK-NEXT: br i1 [[COND_FR]], label [[TMP0:%.*]], label [[COND_END_THREAD]]
21-
; CHECK: 0:
22-
; CHECK-NEXT: br label [[COND_END_THREAD]]
20+
; CHECK-NEXT: br i1 [[COND_FR]], label [[COND_END_THREAD]], label [[TMP0:%.*]]
2321
; CHECK: cond.end.thread:
24-
; CHECK-NEXT: [[TMP1:%.*]] = phi i32 [ [[VAL]], [[COND_END]] ], [ 0, [[TMP0]] ], [ 0, [[FOR_BODY]] ]
22+
; CHECK-NEXT: br label [[TMP0]]
23+
; CHECK: 0:
24+
; CHECK-NEXT: [[TMP1:%.*]] = phi i32 [ 0, [[COND_END_THREAD]] ], [ [[VAL]], [[COND_END]] ]
2525
; CHECK-NEXT: [[F_IDX:%.*]] = getelementptr inbounds i32, ptr @f, i64 [[IDX]]
2626
; CHECK-NEXT: store i32 [[TMP1]], ptr [[F_IDX]], align 4
2727
; CHECK-NEXT: [[F_RELOAD:%.*]] = load i32, ptr @f, align 4

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