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+22
-6
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2 files changed

+22
-6
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llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp

+20-4
Original file line numberDiff line numberDiff line change
@@ -164,11 +164,23 @@ class AArch64AsmPrinter : public AsmPrinter {
164164
void emitPtrauthAuthResign(const MachineInstr *MI);
165165

166166
// Emit the sequence to compute the discriminator.
167+
//
167168
// ScratchReg should be x16/x17.
169+
//
168170
// The returned register is either unmodified AddrDisc or x16/x17.
171+
//
169172
// If the expanded pseudo is allowed to clobber AddrDisc register, setting
170173
// MayUseAddrAsScratch may save one MOV instruction, provided the address
171-
// is already in x16/x17.
174+
// is already in x16/x17 (i.e. return x16/x17 which is the *modified* AddrDisc
175+
// register at the same time):
176+
//
177+
// mov x17, x16
178+
// movk x17, #1234, lsl #48
179+
// ; x16 is not used anymore
180+
//
181+
// can be replaced by
182+
//
183+
// movk x16, #1234, lsl #48
172184
Register emitPtrauthDiscriminator(uint16_t Disc, Register AddrDisc,
173185
Register ScratchReg,
174186
bool MayUseAddrAsScratch = false);
@@ -1738,6 +1750,7 @@ Register AArch64AsmPrinter::emitPtrauthDiscriminator(uint16_t Disc,
17381750
Register AddrDisc,
17391751
Register ScratchReg,
17401752
bool MayUseAddrAsScratch) {
1753+
assert(ScratchReg == AArch64::X16 || ScratchReg == AArch64::X17);
17411754
// So far we've used NoRegister in pseudos. Now we need real encodings.
17421755
if (AddrDisc == AArch64::NoRegister)
17431756
AddrDisc = AArch64::XZR;
@@ -2063,10 +2076,13 @@ void AArch64AsmPrinter::emitPtrauthBranch(const MachineInstr *MI) {
20632076
if (BrTarget == AddrDisc)
20642077
report_fatal_error("Branch target is signed with its own value");
20652078

2066-
// x16 and x17 are implicit-def'ed by MI, and AddrDisc is not used as any
2067-
// other input, so try to save one MOV by setting MayUseAddrAsScratch.
2079+
// If we are printing BLRA pseudo instruction, then x16 and x17 are
2080+
// implicit-def'ed by the MI and AddrDisc is not used as any other input, so
2081+
// try to save one MOV by setting MayUseAddrAsScratch.
2082+
// Unlike BLRA, BRA pseudo is used to perform computed goto, and thus not
2083+
// declared as clobbering x16/x17.
20682084
Register DiscReg = emitPtrauthDiscriminator(Disc, AddrDisc, AArch64::X17,
2069-
/*MayUseAddrAsScratch=*/true);
2085+
/*MayUseAddrAsScratch=*/IsCall);
20702086
bool IsZeroDisc = DiscReg == AArch64::XZR;
20712087

20722088
unsigned Opc;

llvm/lib/Target/AArch64/AArch64InstrInfo.td

+2-2
Original file line numberDiff line numberDiff line change
@@ -1869,7 +1869,7 @@ let Predicates = [HasPAuth] in {
18691869
// This directly manipulates x16/x17, which are the only registers the OS
18701870
// guarantees are safe to use for sensitive operations.
18711871
def BRA : Pseudo<(outs), (ins GPR64noip:$Rn, i32imm:$Key, i64imm:$Disc,
1872-
GPR64:$AddrDisc), []>, Sched<[]> {
1872+
GPR64noip:$AddrDisc), []>, Sched<[]> {
18731873
let isCodeGenOnly = 1;
18741874
let hasNoSchedulingInfo = 1;
18751875
let hasSideEffects = 1;
@@ -1880,7 +1880,7 @@ let Predicates = [HasPAuth] in {
18801880
let isBarrier = 1;
18811881
let isIndirectBranch = 1;
18821882
let Size = 12; // 4 fixed + 8 variable, to compute discriminator.
1883-
let Defs = [X16,X17];
1883+
let Defs = [X17];
18841884
}
18851885

18861886
let isReturn = 1, isTerminator = 1, isBarrier = 1 in {

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