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2 parents a081fc7 + 6274c0f commit 7749251Copy full SHA for 7749251
src/shims/intrinsics/simd.rs
@@ -437,13 +437,13 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
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let val = match (op.layout.ty.kind(), dest.layout.ty.kind()) {
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// Int-to-(int|float): always safe
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(ty::Int(_) | ty::Uint(_), ty::Int(_) | ty::Uint(_) | ty::Float(_)) =>
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- this.misc_cast(&op, dest.layout.ty)?,
+ this.int_to_int_or_float(&op, dest.layout.ty)?,
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// Float-to-float: always safe
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(ty::Float(_), ty::Float(_)) =>
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+ this.float_to_float_or_int(&op, dest.layout.ty)?,
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// Float-to-int in safe mode
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(ty::Float(_), ty::Int(_) | ty::Uint(_)) if safe_cast =>
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// Float-to-int in unchecked mode
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(ty::Float(FloatTy::F32), ty::Int(_) | ty::Uint(_)) if !safe_cast =>
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this.float_to_int_unchecked(op.to_scalar().to_f32()?, dest.layout.ty)?.into(),
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